Teledyne Kibra DDR, User Manual, Page: 67 / 174

Kibra DDR Protocol Analyzer User Manual 65
Recording Options Setup Teledyne LeCroy

Defining “Arm” and “Reset” conditions are optional.

“Reset” and “Trigger” conditions can be defined as “Timer” condition instead of
“Signal Transition”. This is useful for defining user defined timing violations.
Figure 2.34: DDR Select Signals Dialog
Note:
Signals displayed in XXXX format represent traditional binary bit positions. So, ODT0 "High"
would be XXX1, and ODT2 "Low" would be X0XX, etc.
Clock Present
Clock Present triggers when either the clock is seen or the clock is disabled for a short
period of time (see Figure 2.35 on page 66 ). This can be used to trigger on the clock going
away for a period of time. This is done by using a sequence trigger as follows:
Arm on Clock Present: Clock Disable. This will arm whenever the clock stops for a
short time.
Trigger After some number "x" of clocks (nClk). "x" is the amount of time that the
clock is off that should cause a trigger.
Reset Arm on Clock Present: Clock Present. This goes back to the arm state, to look
for the next clock disabled period.