19-2233 PC2
2019-02-01
35(50)
ADQ7DC Manual
16-1796 PC2 2019-02-01
35(50)
6.5 Dedicated GPIO connector on form factor –PCIe or –PXIe
This section is only valid for ADQ7 hardware with options –PCIe or –PXIe.
In addition to the GPIO functions of TRIG and SYNC signals there is a HD-DSUB connector with addi-
tional GPIO connections. The GPIO signals are available in the software development kit for integration
in the user’s application software. The signals are also available in the ADQ Development Kit for inte-
gration in real-time firmware.
The HD-DSUB on the front panel is a 44-pin connector with 12 single-ended individually controlled bi-
directional signal, 2 LVDS inputs, 4 LVDS outputs and 2 LVDS clock capable inputs. The GPIO connec-
tions are described in
The structure for the single-ended pins is shown in
and for the LVDS pins in
.
#
DESCRIPTION
USER COMMAND
a
There are 12 individually controlled external GPIO signals.
b
GPIO input function always reads the state of the pin. The GPIO output
function is activated by the user.
SetDirectionGPIOPort
c
The user may access the pin by reading and writing from the software.
ReadGPIOPort
WriteGPIOPort
d
The user may build firmware in the ADQ Development Kit for real-time
interaction with the GPIO signals.Then GPIO is accessed through register
access commands.
ReadUserRegister
WriteUserRegister
Figure 25: ADQ7 structure of each of the 12 single-ended pins available with options –PCIe and –PXIe.
#
DESCRIPTION
USER COMMAND
a
There are 2 LVDS inputs, 2 LVDS clock capable inputs, and 4 LVDS
output signals in the connector.
b
The direction is fixed for these pins
c
The user may access the pin by reading and writing from the software.
ReadGPIOPort
WriteGPIOPort
d
The user may build firmware in the ADQ Development Kit for real-time
interaction with the GPIO signals.Then GPIO is accessed through register
access commands.
ReadUserRegister
WriteUserRegister
Figure 26: ADQ7 structure of each of the 12 single-ended pins available with options –PCIe and –PXIe.
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