19-2233 PC2
2019-02-01
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ADQ7DC Manual
16-1796 PC2 2019-02-01
11(50)
3
SIGNAL QUALITY ENHANCEMENT
3.1 Digital Baseline Stabilizer
The Digital Baseline Stabilizer, DBS, is designed for pulse data measurement where high accuracy rel-
ative a known baseline is required. The key features of DBS are:
•
Tracks and compensates for baseline variations from, for example, temperature and aging.
•
Suppresses pattern noise
1
to 22 bits precision.
•
Automatically locks the baseline to a user defined-value.
Note that DBS is off at power up. DBS has to be activated by the user’s application software. The time
when DBS is activated is important. To get a good initial estimate, DBS should be activated when there
is very little signal energy present at the input. If there is too much signal power in the initial estimate,
the convergence of DBS is slowed down.
Note that DBS is defined for systems with a baseline and distinct short pulses. DBS is not intended for
sinusoidal type of signals. For sinusoidal types of signals use ADX,
.
3.2 Interleaving correction ADX
The Interleaving correction ADX is available on the 5 GSPS, which is internally interleaved, and on the
interleaved single channel 10 GSPS version of ADQ7.
The ADX automatically corrects for interleaving mismatch in gain, offset, and timing in the ADC cores.
The ADX also compensates for variation over frequency.
At start-up, ADX is loaded with factory calibrated settings but the correction is by-passed. Control ADX
by the commands
SetInterleavingIPEstimationMode
and
SetInterleavingIPBypassMode
.
Note that DBS has to be switched off if ADX is used.
Note that ADX is intended for systems with high energy in concentrated frequency bands, like radio
channels.
1. Pattern noise is systematic errors that may arise from the actual design of the ADC IC or the board design.
