Teledyne SP Devices ADQ7 User Manual Download Page 12

Classification

Revision

Public

PA1

Document ID

Print date

19-2241

2019-05-02

placing

GET_SAMPLE_CH_A

macro in function

cast_and_validate_kernel

located in

OCT_func.cu

. Re-

member to rebuild example (

make

) for the changes to take effect.

5.2.3

Known Bugs

1.

Resizing of the window causes a high number re-scaling events leading to a temporary slowdown

of the GPU, this can be avoided by freezing the frame (

f

) before resizing.

2.

Transfer speed is calculated from buffer size, the size of skipped samples because of invalid lines

is not subtracted, thus the figure is only 100% accurate when all lines are valid.

5.3

AMD Example

The example for AMD GPUs is written using DirectGMA with OpenCL. DirectGMA works by setting up

a bus writable buffers with

markers

in GPU memory. Data is written into a buffer and when it is full an

iterator is written to the associated marker. A wait command is added to the OpenCL queue which blocks

the queue until a marker write is detected. At that time a kernel enqueued after the marker wait can run.

This sequence is repeated in an alternating pattern for two buffers. The enqueued operations copy the

content of the data and

data_valid

buffers to another set of buffers and reinitializes data valid buffer.

5.3.1

Running the example

1.

Make sure the ADQ7 device driver is installed.

2.

Make sure AMD driver is installed and directGMA activated

3.

Make sure Visual studio 2017 or never is installed

4.

Install OCL-SDK:

OCL-SDK installer

5.

Go to directory examples/amd/example

6.

Open visual studio project file and build release x64

7.

Run example:

ADQ7_DirectGMA_example

8.

For more details see included README.

5.3.2

Adjusting Example Settings

The file

gpu_streaming_defines.h

contains macros for settings and debug printouts. Remember to

rebuild example for the changes to take effect.

References

[1] Teledyne Signal Processing Devices Sweden AB,

14-1351 ADQAPI Reference Guide

. Technical

Manual.

ADQ7 GPU Peer-To-Peer – User Guide

www.teledyne-spdevices.com

Page 11 of 11

Summary of Contents for ADQ7

Page 1: ...ADQ7 GPU Peer To Peer User Guide Author s Teledyne SP Devices Document ID 19 2241 Classification Public Revision PA1 Print date 2019 05 02...

Page 2: ...a Valid 7 4 3 Set up P2P GPU with SetupDMAP2p2D 7 4 3 1 Nvidia 7 4 3 2 AMD 8 4 4 Wait for a Completed Buffer 8 4 4 1 Nvidia 8 4 4 2 AMD 8 4 5 Detect and Handle Overflows 8 4 6 Process Received Data an...

Page 3: ...sing unit Graphics card OCT Optical coherence tomography P2P Peer to peer UL2 User logic 2 open FPGA area in the ADQ7 firmware 2 Prerequisites Hardware ADQ7 digitizer Peer to peer capable GPU Windows...

Page 4: ...he right hand side of the data buffer the data valid buffer is shown containing the number one for each valid line A A A A A A A A B B A A A A A A A A B B A A A A A A A A B B 1 1 1 1 1 1 Figure 1 Reco...

Page 5: ...e attached example code 3 3 Backplane Peer To Peer Transfer Data is written from the digitizer directly to the GPU without going through the host CPU or host memory This reduces requirement on the hos...

Page 6: ...05 02 a switch it is not a mandatory function of the PCIe standard Therefore make sure that there is a PCIe switch between the two endpoints or that the root complex supports peer to peer transfer AD...

Page 7: ...be used Initialize GPU driver Allocate and pin buffers in GPU Initialize ADQ Set up triggers Set up P2P GPU with SetupDMAP2p2D Start streaming Wait for a completed buffer Detect and handle overflows P...

Page 8: ...with data processing active 32 128 512 2048 8192 32768 131072 524288 2097152 8388608 5000 5200 5400 5600 5800 6000 6200 6400 6600 6800 7000 7200 1ch 2ch Record length samples MiB s Figure 4 Maximum t...

Page 9: ...AMD Completed buffers are detected by GPU The function clEnqueueWaitSignalAMD is used to make GPU wait until the marker associated with the specified buffer is equal to or greater than the specified v...

Page 10: ...d on the ADQ7 backplate Table 2 Signal connections for ADQ7 device Signal ADQ7 input Analog channel A A Analog channel B B optional A trigger Trig B trigger Sync optional 5 2 Nvidia Example The exampl...

Page 11: ...el module for GPUDirect make 6 Load kernel module sudo insmod sh 7 Go to directory ADQ7_GPUDirect_example source 8 Build example make 9 Run example cuda_example Once the example is running press h for...

Page 12: ...OpenCL queue which blocks the queue until a marker write is detected At that time a kernel enqueued after the marker wait can run This sequence is repeated in an alternating pattern for two buffers T...

Page 13: ...ngen 6 SE 583 30 Link ping Sweden Phone 46 0 13 645 0600 Fax 46 0 13 991 3044 Email spd_info teledyne com Copyright 2019 Teledyne Signal Processing Devices Sweden AB All rights reserved including thos...

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