Classification
Revision
Public
PA6
Document Number
Date
17-1957
2018-06-07
4.1.3
Internal Trigger
The internal trigger period may be configured with sample resolution using
SetInternalTriggerPeriod()
.
By default, the internal trigger is free running and triggers are normally gated with the device arming me-
chanism. However, the function
SetInternalTriggerSyncMode()
allows synchronization of the internal
trigger to some external event (detected on the TRIG connector).
4.1.4
External Trigger
The digitizer detects external trigger events on the TRIG connector with sample precision. The DC-
coupled input accepts a signal in the range
[-0.5, 3.3]
V and the detection threshold level may be confi-
gured using
SetTriggerThresholdVoltage()
.
4.2
Configurable FIR Filter
The data path contains an order 16 linear phase FIR filter. This filter is placed before the
sample skip
function which, if combined, enables proper decimation of the data stream.
The filter coefficients use a 16-bit 2’s complement representation with 14 fractional bits. Thus, the
representable range is
[-2, 2 - 2
-14
].
The properties of the filter yields a symmetric impulse response with the point of symmetry at coeffi-
cient
h
(8)
. The API function
SetUserLogicFilter()
is used to update the filter coefficients and expects
exactly 9 coefficients—up to and including the point of symmetry.
It is possible to specify the coefficients using a floating point representation. However, this is a fe-
ature provided for convenience and values will still be converted to fixed-point numbers before being
transferred to the device. The result of the rounding is visible in the device’s trace log file. Please refer
to the function’s entry in the ADQAPI reference guide [
3
] for more information.
Important
For convenience, the filter coefficients may be specified using a floating-point representation. Howe-
ver, these value are subjected to rounding as dictated by the argument
rounding_method
and conver-
ted to the filter’s fixed-point representation.
The filter output is subjected to symmetric rounding to 16 bits with rounding
away from zero
as the
tie-breaking rule, i.e.
0.5
≈
1
and
-0.5
≈
-1
. Additionally, the output is saturated if the value is not
representable by the 16-bit 2’s complement representation used by the data.
4.3
Sample Skip
The sample skip function allows downsampling of the full-rate data stream. The set of allowed sample
skip factors depends on the firmware channel configuration. The 1-channel mode supports skip factors
in the set
{1, 2, 4, 8, 16, 32, 33,
. . .
, 65536}
and the 2-channel mode supports skip factors in the set
{1, 2, 4, 8, 16, 17,
. . .
, 65536}.
ADQ7-FWATD User Guide
www.teledyne-spdevices.com
Page 8 of 26
