Teledyne Lecroy PCI Express 5.0 M.2 M-Key Interposer User Manual And Quick Start Manual Download

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Enabling CrossSync PHY Capability

Use the following procedure to enable CrossSync PHY for your the interposer:
1. Locate any miscellaneous signals to be probed.

Top View

2. Locate the PCIe Express pairs probe points, as located on the left and right sides of the interposer.

Left Side View

Right Side View

Buffered Refclk

Copy (UMC)

Pin Header for

Sideband Signals

1.8V Rail Voltage
(UMC)

1.8V Rail Current
shunt (1V=1A)
(UMC)

Passive Probe

Grounds

3.3V Rail Voltage
(UMC)

3.3V Rail Current
shunt (1V=1A)
(UMC)

Upstream Signal Probe Points (Optional)

Downstream Signal Probe Points

(Optional)

Summary of Contents for PCI Express 5.0 M.2 M-Key Interposer

Page 1: ...r PCIe x2 interface for SSDs WWAN or other non storage devices Socket 3 keyed as M is strictly for high performance storage offering x4 lanes of bandwidth in this form factor In some cases a B M keyed...

Page 2: ...user to attach and secure the Teledyne LeCroy M 2 interposer cable on the host system which usually supports different M 2 card form factors Follow below instructions to install the extension bracket...

Page 3: ...er 5 The view from the top side of the PCB is shown below The text Type 2280 is clearly visible Attaching the Cables to the Interposer 1 Once the cable assembly has been completed Method One or Method...

Page 4: ...d which are 2230 2242 3042 2260 2280 and 22110 Move the M 2 standoff based on the DUT Type The standoff will be attached to 2280 location by default The DUT is secured by a thumbscrew on the top side...

Page 5: ...lyzer and wait for it to be recognized by the application Note If prompted to update the firmware please do that before proceeding 9 Power on the host machine 10 Launch the Teledyne LeCroy software ap...

Page 6: ...ut clocks can be HCSL LVPECL LVDS or any single ended standard input voltage amplitude not to exceed 800mV SW3 This switch connects the DUT power indication LEDs to the bus power In some systems with...

Page 7: ...yzer User Manual Side Band Test Point Header J6207 Connector Pin Number Signal Name Connector Pin Number Signal Name 1 Ground 17 VIO_CFG_HDR 2 No Connection 18 No Connection 3 CLK_32KHZ_SUSCLK_HDR 19...

Page 8: ...and MAUI oscilloscope software optional Signal Name PE222UIA X PE222UIA X 1PHY PE222UIA X 2PHY PE222UIA X 4PHY Pin Headers CLK_32KHZ SUSCLK X X X X DAS DSS LED_1 X X X X ALERT IN X X X X PEDET X X X X...

Page 9: ...Capable Product Description Product Code High speed Data Signals 8 GHz differential probe with ProLink interface DH08 PL 13 GHz differential probe with ProLink interface DH13 PL 16 GHz differential pr...

Page 10: ...Express pairs probe points as located on the left and right sides of the interposer Left Side View Right Side View Buffered Refclk Copy UMC Pin Header for Sideband Signals 1 8V Rail Voltage UMC 1 8V...

Page 11: ...oscilloscope probes to the PCI express signals as shown in the figure below Connect each Oscilloscope Probe to the Required PCIe Bus Signal Interposer Ready for a Scope Analysis of Two Upstream and Do...

Page 12: ...emarks of Teledyne LeCroy All other trademarks are property of their respective companies Changes Product specifications are subject to change without notice Teledyne LeCroy reserves the right to revi...