Tektronix P6450, Instruction Manual

Page: 39 / 51

Reference
Probe Pinout De fi nition and Channel Assignment
This section contains probe pinout de fi nitions and channel assignment tables for
the P6450 probe.
P6450 Single-ended
Probewith D-Max probing
technology
The following fi gure shows the pad assignments, pad numbers, and signal names
for the PCB footprint of the P6450 single-ended logic analyzer probe. (See
Figure 18.) The P6450 probe has 32 data channels, one clock, and one quali
fi er
for each footprint.
Figure 18: P6450 single-ended PCB footprint pinout detail
The following table lists the channel mapping to a logic analyzer module for a
P6450 single-ended logic analyzer probe. (See Table 4.)
Table 4: Channel assignment for a P6450 single-ended logic analyzer probe
Number of channels 136 136 or 102 136 or 102 136 or 102 68 68 or 34
Pin Signal Probe4 Probe 3 Probe 2 Probe 1 Probe 2 Probe 1
A1 D0 E2:0 A2:0 A0:0 C2:0 A0:0 C2:0
A2 D1 E2:1 A2:1 A0:1 C2:1 A0:1 C2:1
A3 GND GND GND GND GND GND GND
A4 D4 E2:4 A2:4 A0:4 C2:4 A0:4 C2:4
A5 D5 E2:5 A2:5 A0:5 C2:5 A0:5 C2:5
A6 GND GND GND GND GND GND GND
A7 CK1 Q3 CK0 CK1 CK3 CK1 CK3
A8 NC NC NC NC NC NC NC
A9 GND GND GND GND GND GND GND
A10 D10 E3:2 A3:2 A1:2 C3:2 A1:2 C3:2
A11 D11 E3:3 A3:3 A1:3 C3:3 A1:3 C3:3
A12
GND GND GND GND GND GND GND
A13 D14 E3:6 A3:6 A1:6
C3:6
A1:6
C3:6
A14 D15 E3:7 A3:7 A1:7 C3:7 A1:7 C3:7
A15 GND GND GND GND GND GND GND
A16 D18 E1:5 D3:5 D1:5 C1:5 D1:5 A3:5
A17 D19 E1:4 D3:4 D1:4 C1:4 D1:4 A3:4
A18 GND GND GND GND GND GND GND
A19 D22 E1:1 D3:1 D1:1 C1:1 D1:1 A3:1
P6450 High-Density Logic Analyzer Probe Instruction Manual 23