Appendix B: Status model
2470 High Voltage SourceMeter Instrument Reference Manual
B-14
2470-901-01 Rev. A /
May
2019
The serial poll does not clear the low-level registers that caused the SRQ to occur. You must clear the
low-level registers explicitly. Refer to
(on page B-16).
For common commands and TSP commands, B6 is the MSS (Message Summary Status) bit. The
serial poll does not clear the MSS bit. The MSS bit remains set until all enabled Status Byte Register
summary bits are reset.
For information on serial polling on a GPIB system, see
(on page 2-16).
Programming enable registers
You can program the bits in the enable registers of the Status Model registers.
When you program an enable register bit to 0, no action occurs if the bits in the corresponding
registers are set (1).
When you program an enable register bit to 1, if the bits in the corresponding registers are set (1), the
AND condition occurs and a bit in the Status Byte Register is set to (1).
You must program all bits in an enable register at the same time. This means you need to determine
what each bit value in the register will be, then add them together to determine the value of all the bits
(on page B-15) for more information on determining the
value of the bits in the registers.
For example, you might want to enable the Standard Event Register to set the ESB bit in the Status
Byte Register whenever an operation complete occurs or whenever an operation did not execute
properly because of an internal condition. To do this, you need to set bits 0 and 3 of the Standard
Event Register to 1. These bits have decimal values of 1 and 8, so to set both bits to 1, you set the
register to 9.
Using SCPI:
Send the command:
*ese 9
Using TSP
Send the command:
status.standard.enable = 9
Reading the registers
You can read any register in the status model. The response is a decimal value that indicates which
bits in the register are set. See
(on page B-15) for information on how to
convert the decimal value to bits.
