The interlock line is enabled when it is pulled high through a
switch to > +4 V. To drive the interlock pin high, the external
supply must supply a minimum of 50 mA. The interlock line
is disabled when the signal applied is < +4 V. The absolute
maximum input is − 0.4 V to +6.0 V.
The interlock is intended for use through a normally open
switch. This switch may be installed on the lid of a test
fixture, the enclosure of a semiconductor prober or device
handler, or on the doors of a test equipment rack.
The interlock line is pin 24 of the digital input/output
connector on the rear panel of the 2657A, as shown in the
following figure.
1
14
13
25
DIGITAL I/O
Pin 22: +5 V
Pin 24: Interlock
A +5.0 V pin is also available on the digital I/O connector
(pin 22). To use the interlock, connect the 5 V pin and the
interlock pin to the input and output, respectively, of the
switch in your test system.
The following graphics show how the interlock is intended to
be used with a generic test fixture.
!
SENSE
LO
HI
LO
GUARD
SENSE
HI
LO
3030 VDC
MAX.
250 V
MAX.
Model 2657A
DIGITAL I/O
Guard
1
14
13
25
LO
Sense LO
HI
Sense HI
Guard
+5 V dc
