TM 11-6625-3145-14
Theory of Operation-318/338 Service
318/338 A06 MPU/DISPLAY BOARD <11>
A simplified diagram of the keyboard, the MPU circuits, and the display circuits is shown in Figure 4-10. The main
elements of these circuits are the MPU, the Display Controller, the Interrupt Gate stages, the RAMs, and the front panel
keyboard controls.
MPU
The Z-80A microprocessor unit (A06U200) is the heart of the 318/338. All other stages of the circuitry either provide data
to the MPU and receive instructions from it, or they accept data from the MPU and issue instructions to it.
Due to the complexity of the MPU’s operation, a complete description of A06U200 is not provided. If detailed information is
needed, refer to the Z80-CPU, Z80A-CPU Technical Manual published by Zilog.
RAM
Temporary storage of data and addresses for the MPU, and storage of data acquired from the probe input, is provided by
RAMs A06U400 and A06U401.
BUS DRIVERS
The bus drivers consist of A06U210, A06U212, A06U214, and A06U216, A06U210 and A06U212 are address bus drivers,
A06U216 is a data bus transceiver, and A06U214 is an MPU control driver (inverted). These drivers send or receive the
MPU signals to or from other boards.
KEYBOARD AND KEYBOARD CONTROLLER
Control inputs from front-panel keys (except for the STOP key) are encoded by A06U300 and A06U310. When a key is
pressed, X-axis lines (KBX0-KBX7) and Y-axis lines (KBY0-KBY7) supply a data matrix of the key pressed to A06U300
and A06U310.
A06U301 encodes eight X-axis lines to three binary lines; A06U300 encodes eight Y-axis lines to three binary lines. These
signals and the Key Push Acknowledge (KPA) signal are sent to the MPU data bus via tri-state bus buffer A06U320.
A06U320 is controlled by KB CS (MPU I/O address = EO read) from the A05 ROM/Threshold board<10>.
The KPA signal generates the key interrupt signal using A06R320, A06C320, and A06U220. A06R320 and C320 form an
integration circuit, which deletes KPA chattering. KPA without chattering is supplied to A06U220C pin 9.
A06U220 is a Quad 2-Input NAND Schmitt Trigger that controls the keyboard interrupt mask or unmask by KBMASK
(MPU I/O address = F2 bit 3 write) from the A05 board.
INTERRUPT GATES
The interrupt gates consist of A06U220 (Quad NAND Schmitt Trigger).
DISPLAY CONTROLLER
The display controller consists of A06U130, A06U134, A06U138, A06U500, A06U510, A06U515, A06U520, A06U525,
A06U530, A06U540, A06U542, and A06Q550.
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Summary of Contents for 318
Page 119: ...318 VERIFICATION AND ADJUSTMENT PROCEDURES ...
Page 182: ...338 VERIFICATION AND ADJUSTMENT PROCEDURES ...
Page 253: ...318 ___________________ TROUBLESHOOTING TREES ...
Page 344: ...338 TROUBLESHOOTING TREES ...
Page 517: ...TM 11 6625 3145 14 318 338 4434 923 318 Block Diagram ...
Page 518: ...TM 11 6625 3145 14 318 338 4434 924 338 Block Diagram ...
Page 519: ...TM 11 6625 3145 14 318 338 4434 925 318 Acquisition Module Wiring Diagram ...
Page 520: ...TM 11 6625 3145 14 318 338 4434 926 318 338 Mainframe Wiring Diagram ...
Page 521: ...TM 11 6625 3145 14 318 338 4434 926 338 Acquisition Module Wiring Diagram ...
Page 522: ...TM 11 6625 3145 14 318 338 4434 928 Figure 9 1 318 A01 Input A Board Component Locations ...
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Page 528: ...TM 11 6625 3145 14 Figure 9 3 318 338 A03 ACQ Control Board Component Locations ...
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Page 542: ...TM 11 6625 3145 14 Figure 9 8 318 338 A10 CRT Board Component Locations ...
Page 544: ...TM 11 6625 3145 14 Figure 9 9 318 338 A11 Inverter Board component Locations ...
Page 546: ...TM 11 6625 3145 14 Figure 9 10 318 338 A12 Regulator Board Component Locations ...
Page 551: ...TM 11 6625 3145 14 Figure 9 12 338 A01 Input A Board Component Locations ...
Page 553: ...TM 11 6625 3145 14 318 338 SERVICE ...
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Page 555: ...PIN 058584 ...