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TS-5400 User’s Manual 

Technologic Systems 

 

10/31/03

 

29

Appendix D  - System I/O Map 

The following table lists the I/O addresses used 
by the system.  This is all a very standard PC 
compatible I/O map.  All other I/O locations from 
100h through 3FFh are available on the PC/104 
expansion bus. 

 

 

The I/O ranges of 100h – 13Fh and 200h – 26Fh 
are excellent choices for PC/104 daughter board 
I/O usage.  When designing a custom PC/104 
daughter board, a User Chip Select is available 
on PC/104 Bus pin B19 that decodes the I/O 
range 140h – 15Fh.  This can make for a simpler 
and more cost-effective design.  

 

Hex Address  Resource 

400h - FFFFh 

PC/104 Bus  
(Not recommended for use) 

3F8h – 3FFh 

COM1 

3F6h – 3F7h 

Primary IDE   (Compact Flash) 

3E8h – 3EFh 

Reserved for COM3 

3B4h – 3DFh 

Video   (TS-9500) 

376h – 377h 

Secondary IDE     (TS-9500) 

2F8h – 2FFh 

COM2 

2E8h – 2EFh 

Reserved for COM4 

278h – 27Ah 

Reserved for LPT1 

1F0h – 1F7h 

Primary IDE   (Compact Flash) 

198h – 19Fh 

Registers on TS-9500 

196h – 197h 

Reserved for A/D Converter 

170h – 177h 

Secondary IDE     (TS-9500) 

140h – 15Fh 

User Chip Select   (PC/104 Bus) 

080h – 0FFh 

Internal Elan520 peripherals  

074h – 07Fh 

DIO and Control registers  

072h – 073h 

LCD port 

070h – 071h 

RTC and CMOS memory 

060h – 064h 

Keyboard Controller   (TS-9500) 

000h – 05Fh 

Internal Elan520 peripherals  

Table 11 – TS-5400 I/O Map 

 

I/O   

Address 

R / W 

Resource 

74h 

Read 

Product Code 

40h = Product Code for TS-5400 

75h 

Read 

Read 

R/W 

R/W 

Bit 0 = SRAM Option      Present = “1” 

Bit 1 = RS-485 Option    Present = “1” 

Bit 6 = Enable RS-485   RTS mode 

Bit 7 = Enable RS-485  Automatic 
mode 

76h 

 

Reserved 

77h 

R/W 

Read 

Read 

Read 

Read 

Read 

Read 

Bit 0 = LED    (1 = ON) 

Bit 1 = JP1 

Bit 2 = JP2 

Bit 3 = JP3 

Bit 4 = JP4 

Bit 5 = JP5 

Bit 6 = JP6 

78h 

 

Reserved 

7Dh 

R/W 

Control Register for DIO and LCD 

Bit 0 = Direction of DIO_0  –  DIO_3 

Bit 1 = Direction of DIO_4  –  DIO_7 

Bit 2 = Direction of LCD_0  –  LCD_3 

Bit 3 = Direction of LCD_4  –  LCD_7 

Bit 4 = Enable LCD Mode 

Bit 5 = Direction of DIO_8  –  DIO_11 

Bit 6 = Enable LCD_RS to drive IRQ1 

Bit 7 = Enable DIO_13 to drive IRQ5 

7Eh 

R/W 

DIO_0   thru   DIO_7         (Bits 0-7) 

7Fh 

R/W 

DIO_8   thru   DIO_13       (Bits 0-5) 

Table 12 – TS-5400 DIO and Control Registers  

 

 

Summary of Contents for TS-5400

Page 1: ...TS 5400 User s Manual ...

Page 2: ... Hills AZ 85268 480 837 5200 FAX 837 5300 info embeddedx86 com http www embeddedx86 com This revision of the manual is dated October 23 2003 All modifications from previous versions are listed in the appendix Copyright 1998 2003 by Technologic Systems Inc All rights reserved ...

Page 3: ...nt the RMA number on the outside of the package This limited warranty does not cover damages resulting from lighting or other power surges misuse abuse abnormal conditions of operation or attempts to alter or modify the function of the product This warranty is limited to the repair or replacement of the defective unit In no event shall Technologic Systems be liable or responsible for any loss or d...

Page 4: ...BUTTON 17 13 PC 104 BUS EXPANSION 18 14 LOADING OR TRANSFERRING FILES 19 14 1 Developing with the Technologic Systems TS 9500 19 14 2 Transferring files with Compact Flash 19 14 3 Zmodem Downloads 19 15 DEBUGGING 20 15 1 Integrated BIOS Debugger 20 15 2 Using other debuggers 20 16 VIDEO KEYBOARD AND CONSOLE REDIRECTION 21 17 SYSTEM BIOS SETUP SCREENS 22 17 1 Main CMOS Configuration Screen 22 17 2 ...

Page 5: ...v Int 15h Function B040h Matrix Keypad Support 31 Int 15h Function A1h Console I O Redirection 31 Int 15h Function B020h Jumper Pin Status 32 APPENDIX F USING A HIGHER RATE 10X BAUD CLOCK 33 APPENDIX G FURTHER REFERENCES 34 APPENDIX H MANUAL REVISIONS 34 ...

Page 6: ...fairly short This is because for the most part the TS 5400 is a standard x86 based PC compatible computer and there are hundreds of books about writing software for the PC platform The primary purpose of this manual is documenting where the TS 5400 differs from a standard PC 2 PC Compatibility PC compatibility requires much more than just an x86 processor It requires PC compatible memory and I O m...

Page 7: ...g The remainder of the Flash memory 1920 KB is configured as two solid state disk SSD drives appearing as drive A and drive B Drive A uses 896 KB of Flash memory while drive B uses the remaining 1024 KB of Flash memory Both drives are fully supported by the BIOS as INT 13h drives The physical Flash memory is accessed by the BIOS in protected mode at memory address 148M The Flash memory is guarante...

Page 8: ...pping CF cards at least Windows ME seems to prefer this Note The TS 5400 always needs to be powered off before swapping CF cards 4 5 Non Volatile SRAM The 32 pin socket can also optionally hold 32 KB of Non volatile SRAM memory This behaves exactly like battery backed SRAM This or the DiskOnChip may be installed but not both Non volatile SRAM provides non volatile memory with unlimited write cycle...

Page 9: ...n RTS mode the serial port RTS signal controls the RS 485 transmitter receiver See Automatic mode below When RTS is asserted true the RS 485 transmitter is enabled and the receiver disabled When RTS is de asserted the transmitter is tri stated disabled and the receiver is enabled Since the transmitter and receiver are never both enabled the serial port UART does not receive the data transmitted Fo...

Page 10: ... transceiver at the correct times This only requires the TIMER2 to be initialized once based on baud rate and data format and bit 7 at I O location 75 must be set A utility called AUTO485 exe is included in the AUTOEXEC bat that simplifies this task 5 5 Adding Serial Ports If your project requires more than two serial ports additional ports may be added via the PC 104 expansion bus Technologic Sys...

Page 11: ...e to a standard alphanumeric LCD display At system reset the port defaults to DIO mode If using an LCD display this port can be switched to LCD mode by writing a 1 into bit 4 at I O location Hex 7D or the BIOS call to enable the LCD also sets bit 4 at I O location Hex 7D See Section 7 for LCD mode When the LCD port is in DIO mode pins LCD_RS and LCD_WR are digital inputs LCD_EN is a digital output...

Page 12: ...n D0 D7 are bi directional buffered copies of the data bus and carry all data and commands to the LCD Table 3 is not the standard pin outs given for LCD displays But this pin out allows a standard ribbon cable to be used when the ribbon cable is attached to the backside of the LCD Example LCD code is available at http www embeddedx86 com downloads util zip 8 Matrix Keypad Support The DIO2 port sig...

Page 13: ...e DM9102A and do not require initialization by the processor DOS TCP IP Configuration Packet Driver and WATTCP A standard packet driver for DOS is installed on the board as shipped along with sample network applications written with the public domain Waterloo TCP IP software WATTCP WATTCP is a freely available package including source code that provides TCP IP connectivity for programs written for...

Page 14: ...www embeddedx86 com Technologic Systems Example Configuration Pinging www embeddedx86 com 209 130 84 83 sent PING 1 PING receipt 1 response time 0 00 seconds Ping Statistics Sent 1 Received 1 Success 100 Average RTT 0 35 seconds A Other WATTCP examples include serial to telnet redirector http file download telnet server and finger Many more can be downloaded from the internet as freeware DOS TCP I...

Page 15: ...g eth1 By default the eth1 config file has ENABLE no which means eth1 will not be configured on boot up Change this to yes if you want eth1 configured by the startup scripts The TCP IP network settings are configured in the file etc sysconfig network_cfg here is a listing Technologic Systems General Network Configuration File NETWORKING yes GATEWAY 192 168 0 1 Gateway for internet access GW_DEV et...

Page 16: ...lock operation for a minimum of 10 years in the absence of power It is located at the standard PC I O addresses of Hex 070 and 071 The top 48 bytes index 50h through 7Fh are not used by the BIOS and are available for user applications The RTC is capable of generating a square wave output function with a period of 500 mSec to 122 uSec The square wave output pin is connected to IRQ8 on the processor...

Page 17: ...itional failsafe feature In order to load the WDTMRCTL register a specific sequence of three word writes is required A 3333h followed by CCCCh followed by the value to be loaded into the WDTMRCTL register must be written to the WDTMRCTL register In order to clear the WDT counter feeding the watchdog a clear count key sequence must be written to the WDTMRCTL register This is a specific two word wri...

Page 18: ... not turn on at all when power is applied the most likely problem is the power supply Check that the 5V and GND connections are not reversed A diode protects the board against damage in such a situation It is preferred to use BIOS interrupt functions to interface software with the user LED and option jumpers Please see Appendix F for further details and the utility disk for example code The LED ca...

Page 19: ...it version of the PC 104 bus We have found this allows the support of the vast majority of PC 104 boards including all of the above mentioned examples IRQ3 and IRQ4 are typically used by COM2 and COM1 and are not available on the PC 104 bus If a daughter board must use either IRQ3 or IRQ4 it is possible to reconfigure the Elan520 registers and reassign IRQ lines Contact us for details Pin B19 norm...

Page 20: ...14 3 Zmodem Downloads Using the Zmodem protocol to send files to and from the TS 5400 is simple and straightforward The only requirement is a terminal emulation program that supports Zmodem and virtually all do If you are using Windows 95 or later for your development work the HyperTerminal accessory works well To download a file to the TS 5400 from your host PC execute DL BAT at the DOS command l...

Page 21: ...our application code the debugger will automatically be invoked To resume type the G command to GO or continue on with the rest of initialization From DOS ROM by typing INT3 at the command prompt If the full command com interpreter is running this is an internal command If only mini command com is running this will execute a small utility that simply contains an INT 3 instruction From the BIOS Set...

Page 22: ...es for display and keyboard input which are rerouted to the serial port Any program that accesses the video or keyboard hardware directly will not work Keyboard redirection is limited simply because most of the extended keys on the keyboard function keys and Alt key in particular are not sent by the terminal emulator For these reasons the console redirection feature is meant more for system develo...

Page 23: ... the CMOS memory on every boot any changes will be lost Basic CMOS Configuration Setup disk drives drive mapping boot order misc Custom Configuration Setup custom features for Technologic Systems boards Shadow Configuration Setup ROM BIOS shadowing in RAM Start System BIOS Debugger Enter debugger see section 15 Start RS232 Manufacturing Link Enter manufacturing mode to link with host PC Format Int...

Page 24: ...e 2 Not installed Ext Floppy 1 Not installed Ide 3 Not installed 31MB E X Tab to select or to modify Esc to return to main menu The factory defaults shown will first attempt to boot from Compact Flash as Drive C If no CF is installed the BIOS will then boot from Drive A If a CF is installed but it is not desired to boot from this drive change the Boot 1st setting to Drive A In order for the Compac...

Page 25: ...S 5400 User s Manual Technologic Systems 10 31 03 24 Master DIP switch 5 off change the IDE DRIVE GEOMETRY for Ide 2 to AUTOCONFIG PHYSICAL and change the DRIVE ASSIGNMENT for Drive D to Ide 2 Sec Master ...

Page 26: ...mine when to flush cache to SDRAM This setting defaults to Write Through and may be set to Write Back by the user to optimize performance Refer to the AMD Elan SC520 users manual section 8 4 2 2 for more information on cache mode CPU Speed This will set the clock speed for the CPU core This can be set to 100 MHz or 133 Mhz The default speed for commercial temperature products is 133 MHz the defaul...

Page 27: ...llows BIOS extension ROMs to be copied to SDRAM in upper memory regions to reduce access times Execution directly from ROM is significantly slower than executing from SDRAM The region from C000 C7FF is usually reserved for the video BIOS extension in a PC compatible system shadowing is enabled to optimize the video BIOS functions The region from E000 FFFF contains the embedded BIOS code in the TS ...

Page 28: ...ologic Systems 10 31 03 27 Appendix A Board Diagram and Dimensions Appendix B Operating Conditions Operating Temperature 0 to 70 C Extended temperature range is optional Operating Humidity 0 to 90 relative humidity non condensing ...

Page 29: ... 1M 15M or 31M or 63M BIOS Shadow RAM E0000h 896k 128k Elan520 Configuration Registers DF000h 892k 4k PC 104 Bus D2000h 840k 52k DiskOnChip or SRAM D0000h 832k 8k PC 104 Bus or SDRAM user configurable in CMOS setup see sec 17 4 C8000h 800k 32k PC 104 typically video BIOS C0000h 768k 32k PC 104 typically video memory A0000h 640k 128k Lower Memory RAM 00000h 00000 640k Figure 3 TS 5400 Memory Map ...

Page 30: ...ers on TS 9500 196h 197h Reserved for A D Converter 170h 177h Secondary IDE TS 9500 140h 15Fh User Chip Select PC 104 Bus 080h 0FFh Internal Elan520 peripherals 074h 07Fh DIO and Control registers 072h 073h LCD port 070h 071h RTC and CMOS memory 060h 064h Keyboard Controller TS 9500 000h 05Fh Internal Elan520 peripherals Table 11 TS 5400 I O Map I O Address R W Resource 74h Read Product Code 40h P...

Page 31: ... CY 0 carry flag AH 0 AL SP_VERSION For standard versions of the BIOS this is 0 An SP number is assigned when custom modifications are made to the BIOS for a client and it is returned in this register Contact us for further information 00h for standard products BH BIOS Version Major Number E g If the current BIOS version is 2 40 the register will contain 02h BL BIOS Version Minor Number E g If the...

Page 32: ...f the following 0 9 A D and returns the scan code for Carriage Return A custom translation table is 16 words long where each word is a scan code ASCII pair for a key Information on scan codes can be found in books on IBM PC hardware Example programs are included on the utility disk See Section 8 for further details ENTRY AX B040h BH 00 Disable matrix keypad Enable matrix keypad Enable matrix keypa...

Page 33: ...ist below ENTRY AX B020h EXIT CY 0 carry flag AX 0 BX Jumper Pin Status If Bit X 1 the jumper is installed BX Bit Jumper Description 0 JP1 Auto CMOS configuration 1 JP2 Console Redirected to COM port JP6 determines COM port 2 JP3 Write Enable flash A 3 JP4 Console set to 115K baud JP4 off 9600 baud 4 JP5 User definable 5 JP6 Console switched to COM1 JP2 must be installed Table 13 Int15h Function B...

Page 34: ...d The baud rate clock for each COM port is controlled by bit 2 in the UART Control Register UART1CTL and UART2CTL UART1CTL DFCC0h UART2CTL DFCC4h Clearing bit 2 to a 0 will change the clock to the 10X rate NOTE You must not modify the other bits of this register You must use a read modify write procedure to change these bits The following code written in Turbo C provides an example for changing CO...

Page 35: ...loads 12887 pdf Intel 386EX User s Guide http developer intel com design intarch manuals 272485 htm Maxim Integrated Products http www maxim ic com National Semiconductor NS16C450 Data Sheet Omen Technologies http www omen com PC 104 Consortium Web Site http www pc104 org Waterloo TCP IP Software WATTCP http www wattcp com Appendix H Manual Revisions 12 14 01 12 31 02 10 23 03 Initial release Upda...

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