PICO-IMX6 REV. A1. HARDWARE MANUAL
– VER 1.01 – JAN 28 2016
Page
34
of
64
3.7. Audio Interface
The PICO-IMX6 incorporates one I
2
S / AUDMUX instance and can as well provide surround audio over
the HDMI data signals.
The AUDMUX provides flexible, programmable routing of the serial interfaces (SSI1 or SSI2) to and from
off-chip devices. The AUDMUX routes audio data (and even splices together multiple time-multiplexed
audio streams) but does not decode or process audio data itself. The AUDMUX is controlled by the ARM
but can route data even when the ARM is in a low-power mode.
The ESAI (Enhanced Serial Audio Interface) provides a full-duplex serial port for serial communication
with a variety of serial devices, including industry-standard codecs, SPDIF transceivers, and other
processors. The ESAI consists of independent transmitter and receiver sections, each section with its
own clock generator. The ESAI is connected to the IOMUX and to the ESAI_BIFIFO module.
The ESAI_BIFIFO (ESAI Bus Interface and FIFO) is the interface between the ESAI module and the
shared peripheral bus. It contains the FIFOs used to buffer data to and from the ESAI, as well as
providing the data word alignment and padding necessary to match the 24-bit data bus of the ESAI to the
32-bit data bus of the shared peripheral bus.
The ASRC (Asynchronous Sample Rate Converter) converts the sampling rate of a signal associated to
an input clock into a signal associated to a different output clock. The ASRC supports concurrent sample
rate conversions of up to 10 channels of over 120dB THD+N. The sample rate conversion of each
channel is associated to a pair of incoming and outgoing sampling rates. The ASRC supports up to three
sampling rate pairs. The ASRC is connected to the shared peripheral bus.
Key features of the audio signal block include:
Full 6-wire SSI interfaces for asynchronous receive and transmit
Configurable 4-wire (synchronous) or 6-wire (asynchronous) peripheral interfaces
Independent Tx/Rx frame sync and clock direction selection for host or peripheral
Each host interface's capability to connect to any other host or peripheral interface in a point-to-
point or point-to-multipoint (network mode)
Transmit and receive data switching to support external network mode
Table 12 - I
2
S Audio Signal Description
PIN
CPU
BALL
CPU PAD NAME
Signal
V
I/O Description
E1_50
N3
CSI0_DAT7
AUD3_RXD
1V8
I
Integrated Interchip Sound
(I
2
S) channel receive data
line
E1_52
N1
CSI0_DAT4
AUD3_TXC
1V8
O
Integrated Interchip Sound
(I
2
S) channel word clock
signal
E1_54
N4
CSI0_DAT6
AUD3_TXFS
1V8
O
Integrated Interchip Sound
(I
2
S) channel frame
synchronization signal
E1_56
P2
CSI0_DAT5
AUD3_TXD
1V8
O
Integrated Interchip Sound
(I
2
S) channel transmit data
line
