1
2
3
4
5
6
7
8
9
10
11
12
H
G
F
E
D
C
B
A
12
11
10
9
8
7
6
5
4
3
2
1
THIS DRAWING CANNOT BE COMMUNICATED TO UNAUTHORIZED PERSONS COPIED UNLES S PERMITTED IN WRITING
FORMAT DIN A1
H
G
F
E
D
C
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0
When input is 24V:R1 1K5
When input is 12V:R1 3K9
When input is 24V reset vol:16.9V
When input is 12V reset vol:8.4V
Place the Cap Close to main chip
AVDD33_LVDSA
AVDD1V0_LVDS
Close to AVDD33_LVDSA
Analog Power
For ESD
1
1
1
0
0
0
0
0
0
0
When input is 12V,reset time is 80ms
Reset at low level
STRAPPING
eMMC VCC Power
STARPPING
eMMC pins(share pins w/s NAND)
ICE mode+24M+ROM to eMMC boot from
ICE mode+24M+serial boot
ICE mode+24M+ROM to 60bit ECC Nand boot
ICE mode+24M+serial boot(with GPIO)
LED_PWM2
0
1
When input is 24V,reset time is 70ms
LED_PWM0 LED_PWM1
Internal POR
External Reset
R256:NC
R256:Mount
R252:Mount
R252:NC
Only for debug
CONFIG
VB1 OUT
eMMC port
CORE POWER
Close to Main Chip
AVDD33_RGB_STB
Real Material:13-EMM16G-TSB
NC/
THGBMBG7D2K
TXEC+
8K2
BAS316
10U
X24M
AVDD1V0_STB
AJ38
AH38
AJ33
AM35
AK35
AJ36
AJ35
AN37
AM37
AL37
AM36
AL34
AH35
AJ37
AL38
UM1
MT5658
R264
R261
VCC_EMMC
R204
R203
R202
1000P
AS1117-1.8
AU26
AV26
AR26
AT26
AR25
AT25
AU24
AV24
AR24
AT24
AR23
AT23
AU30
AV30
AR30
AT30
AR29
AT29
AU28
AV28
AR28
AT28
AR27
AT27
MT5658
0.1U
REXT_VPLL
FSRC_WR
R247