TCL 40D2930, Service Manual

Page: 21 / 37

Tuner/ T1
HDMI 1&2/
HDMI 3&MHL/
AV/P
SPDIF/
USB/
USB2/P
AUDIO
IR&KEY/
Power
FAT_IN-
FAT+_D
FAT-_D
TUNER-SCL
TUNER-SDA
IFAGC
RF_SW
TUNER-SCL
TUNER-SDA
IFAGC
RF_SW
TU_3V3
HPD
SCL
SDA
RX
CEC
HPD
SCL
SDA
RX
CEC
5
CEC
HPD
SCL
SDA
RX
ARC
HPD
SCL
SDA
RX
ARC
1V1
VCC-OUT
VCC-IN E SENSE
IN1
SPDIF_OUT SPDIF_OUT
LINE_OUT_0L
LINE_OUT_0R
OUT
LOUT
USB D-
USB D+
USB D-
USB
USB D-
USB D+
USB D-
USB D+
5
RP
RN
TP
TN
RP
RN
TP
TN
NET_RP
NET_RN
NET_TP
NET_TN
NET_TXC
NET_RXC
NET_RP
NET_RN
NET_TP
NET_TN
NET_TXC
NET_RXC
RJ45/
HP_L
HP_R
HP/P900
IR_IN
KEY_IN
IR_IN
3V3SB
PANEL_ON
PANEL_VCC
CLK
DATA
PANEL_VCC
CLK
DATA
PANEL_ON
AMP
!"
!"
#!"
L_OUT
/
/U
NAND-RBZ
NAND-REZ
NAND-CEZ
NAND-CLE
NAND-ALE
NAND-WEZ
NAND-WPZ
Data[0..7]
3V3
NAND Flash/
SPIPORT[0..
3]
SPIPORT[0..3]
SPI/UF02
NAND-RBZ
NAND-REZ
NAND-CEZ
NAND-CLE
NAND-ALE
NAND-WEZ
NAND-WPZ
Data[0..7]
U/DDR3/1G
B-DDR3-A[0..14]
B-DDR3-BA0[0..3]
B-DDR3-CS0
B-DDR3-RASZ
B-DDR3-CASZ
B-DDR3-WEZ
B-DDR3-ODT
B-DDR3-DMU
B-DDR3-DQSU
B-DDR3-DQSUB
B-DDR3-
DQU0[0..7]
B-DDR3-DML
B-DDR3-DQSL
B-DDR3-DQSLB
B-DDR3-DML[0.7]
B-DDR3-CKE
B-DDR3-RESET
1V5
B-DDR3-A[0..14]
B-DDR3-BA0[0..3]
B-DDR3-CS0
B-DDR3-RASZ
B-DDR3-CASZ
B-DDR3-WEZ
B-DDR3-ODT
B-DDR3-DMU
B-DDR3-DQSU
B-DDR3-DQSUB
B-DDR3-
DQU0[0..7]
B-DDR3-DML
B-DDR3-DQSL
B-DDR3-DQSLB
B-DDR3-DML[0.7]
B-DDR3-CKE
B-DDR3-RESET
POWER ON
BL_ON
DIMING
POWER
ON
12V
3V3SB
U/ -8-002A
CLOCK GEN.
12V
12V
6<
1V25
XTAL
24MHz
MS08
%3
TV Circuit diagram
SY6280A
AV in/AV1AV6
(Compatibility Design)
HS/VS
RX/TX
BIN+/RIN+
GIN+/GIN-
HS/VS
RX/TX
BIN+/RIN+
GIN+
VGA/CN1
5V
D+/-
WIFI-ON
5V
D+/-
WIFI-ON
CN17