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TC1630R/S User's Manual
Rev. 2.5
Chapter 5 - Component Placement
Figure 6. TC1630R/S's Internal PCB
U4
F1
POWER A
POWER B
F2
JP2
FPGA
chip
1 2 3 4 5 6 7 8
ON
4
3
2
1
SW1
INTERFACE MODULE
+
+
-
-
TERMINAL
BLOCK
CONNECTORS
Dry contact alarm relay
terminal block connector
T1/E1 Line interface
module
T1/E1 input and output
terminal block connectors
T1/E1 RJ-48C
connector
Power A and B Terminal
block connectors
Fuses A, B
FPGA
FPGA configuration
EPROM
Optic transmitter
and receiver
LED indicators
LED indicators
External
DIP switch
TxA
RxA
SW2
DIP switch 2
(not used)
8
7
6
5
