Tadpole SPARCbook 3 series, Reference Manual

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PCMCIA Interface
7-3
TS102 Architecture Overview
The TS102 also features a read-ahead capability. Setting the read-ahead bit
in the TS102 card register causes the TS102 to pre-fetch an additional 8
words a of data after each 8 word read from the card, starting from the
address used in the last transfer. The address used for subsequent PCMCIA
I/O cycles as a result of a single SBus transaction may be static or
incrementing.
The TS102 supplies a single interrupt request to the CPU. This interrupt
request combines requests from the PCMCIA card interface and the
microcontroller interface. Status registers allow the CPU to determine the
source of the interrupt.
7.1.2 PCMCIA interface
The SPARCbook 3 complies to PCMCIA standards which define the
mechanical and electrical specifications for a wide range of removable
memory and I/O cards. However, there is no provision in the PCMCIA
specification for a DMA master on a PCMCIA card.
The PCMCIA interface supports three memory spaces. These are common
memory space, attribute memory space and I/O space. Common memory
space is intended for simple read-write data memory; attribute memory
typically contains the card configuration registers; and I/O space is used by
I/O cards, such as network interface and modem cards.
The transfer cycle time is either fixed, for release 1.0 compatible cards, or
is determined by the card itself via a WAIT line, for release 2.0 compatible
cards. All card types and slots default to a common memory configuration
at power up or following removal of a card. When a card is installed, the
host interrogates the card through attribute memory to determine whether
any I/O pin functions need to be redefined or whether card operating or
programming voltages require adjustment.
A number of PCMCIA cards request low power 3.3 Volts operation via
their attribute memory data, or request two different programming voltages
for use by programmable memory. The TS102 provides bit-ports, which are
used to select the appropiate voltages, as required. However, because some
signals are shared between the two PCMCIA cards, it is not possible to
operate one card at 3.3V while simultaneously operating the other card at
5V.
7.1.3 Microcontroller interface
A simple 8-bit parallel read-write port supports communications with the
microcontroller subsystem. The CPU writes commands to a transmit
register. The act of writing sets a busy bit in the microcontroller parallel
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