Tabor 8020, User Manual

Page: 76 / 111

verter which operates the quad comparator U9 which in
turn operates signal selector U10. U10 selects one of the
following signals: triangle, sinewave or pulses from the
pulse shaper. The signal from the selector is fed in parallel
to a low frequency amplifier U11 and its associated com-
ponents and through C17 and C18 to the high frequency
amplifier. The output of the preamplifier, at the junction
of R46 and R47 is then routed to the attenuator. Q12 is a -
10 dB gain switch which connects R54 in parallel to the
feedback resistor R56.
6-3-7. Attenuator
The attenuator is located on the output amplifier assembly
board. Refer to the schematics at the end of this manual
throughout the following description. The attenuator is
controlled by 3 quad comparators U5, U6 and U7. The data
which is required to operate the comparators is converted
from serial to parallel by U4. The attenuator is connected
in a binary fashion and comprises FETs Q17 through Q32.
One or more switches are on at a time which in turn changes
the equivalent resistance from the preamplifier to the
power amplifier. This adjusts the amplitude level to the
correct level for the output power amplifier.
6-3-8. Offset Generator
The offset generator is located on the output amplifier as-
sembly board. Refer to the schematics at the end of this
manual throughout the following description. The offset
generator generates a DC voltage which is summed with
the selected waveform. The DC voltage is generated by
the D/A converter U14 and operational amplifiers U15
and U16. The reference voltage level is generated by
CR21 and is adjusted by R99. The D to A converter is con-
trolled by serial to parallel converter U13. U17 is con-
nected as a comparator which, when commanded from
U19, turns FET switch Q35 on or off; changing the polarity
of the DC offset. The DC offset amplitude is coupled
through R79 to the output power amplifier.
6-3-9. Power Amplifier
Refer to the schematics at the end of this manual through-
out the following description. The output amplifier con-
sists of low frequency amplifier U18, high frequency am-
plifier Q33, Q34 and Q39 through Q46 and class B power
stage Q38 through Q43. The signal is coupled to the low
frequency amplifier through R95 and to the high fre-
quency amplifier through C36 and C42. The output from
the power amplifier at the junction of R117 and R118 is
connected through a 50 ohm resistance to the decade at-
tenuator.
6-3-10. Post Amplifier Attenuator
The post amplifier attenuator is the final stage through
which the signal is fed. Attenuation ranges from 0dB to
30dB. U19 receives serial information from the micro-
processor serial bus, converts the serial information to par-
allel and operates relays K1, K2 and K3 through buffer
U20. The relays select one of the divider networks which
are formed by the resistors R120 through R125. Relay K3
disconnects the output signal from the output terminal
when a disable command is given through the IEEE bus.
6-3-11. Power Supply
Refer to the power supply schematic at the end of this man-
ual for the following discussions. The power supply con-
sists of a main power transformer, three bridge rectifiers,
four regulators and a 5V regulator which is formed by U21,
Q3, Q4 and Q5, and their associated components. The
LINE fuse and the Line Selector are accessible at the rear
panel. The LINE VOLTAGE SELECT switch select
115V or 230V operation. CR2 is used as a full-wave recti-
fier to provide a sufficient DC voltage for the -24V and
+24V regulators U17 and U18 respectively. CR1 is used
as a full-wave rectifier to provide a sufficient DC voltage
for the -15V and +15V regulators U19 and U20 respec-
tively. U21 receives a reference voltage of 5V from the
15V supply. This reference is compared with the 5V sup-
ply. The difference is amplified by U21 and Q5 and applied
to the series regulator Q3 which, in turn, corrects the out-
put voltage to equal that of the reference voltage.
6-4. PULSE GENERATOR CIRCUIT (model 8021)
The pulse generator circuit is constructed on the same
board as the output amplifier. The complete assembly,
which includes the above sections plus the pulse generator
circuit, is unique to the model 8021. In the following, only
the section pertaining to the pulse generator is described.
The rest of the circuits are identical to those available on
the model 8020. Figure 6-8 is a functional block diagram.
For complete and detailed schematics, refer to the back of
this manual.
In general, the heart of the pulse generator circuit is the
switching transistor. This transistor when turned off or on
enables a charge or discharge sequence respectively on the
range capacitor. The charge current and the selected ca-
pacitor determine the width of the pulse.
Model 8020 Theory Of Operation
Page 6-7