Supero X9SCL, User Manual

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ix
Table of Contents
AddOn ROM Display Mode ........................................................................ 4-4
Bootup Num-Lock ....................................................................................... 4-4
Wait For 'F1' If Error ................................................................................... 4-4
Interrupt 19 Capture ................................................................................... 4-4
Watch Dog Function ................................................................................... 4-5
Power Button Function ............................................................................... 4-5
Restore on AC Power Loss ........................................................................ 4-5
VFC ............................................................................................................ 4-5
Deep Sx ...................................................................................................... 4-5
 Processor & Clock Options .......................................................................... 4-5
Hardware Prefetcher (Available when supported by the CPU) ................. 4-5
Adjacent Cache Line Prefetch (Available when supported by the CPU) ... 4-6
Intel® Virtualization Technology (Available when supported by the CPU) 4-6
Execute-Disable Bit Capability (Available when supported by the OS and
the CPU) ..................................................................................................... 4-6
Intel® AES-NI ............................................................................................. 4-6
Intel® Hyper Threading Technology ........................................................... 4-6
Active Processor Cores .............................................................................. 4-6
Power Technology ...................................................................................... 4-6
EIST ............................................................................................................ 4-6
P-STATE Coordination ............................................................................... 4-7
CPU C3 Report, CPU C6 Report ............................................................... 4-7
C-State package limit setting ..................................................................... 4-7
 Intel® Turbo Boost Technology (Available if Intel® EIST technology is
Enabled) ..................................................................................................... 4-7
Turbo Mode ................................................................................................ 4-7
 Chipset Configuration ................................................................................... 4-7
 CPU Bridge Configuration ....................................................................... 4-7
Memory Frequency .................................................................................... 4-7

North Bridge Configuration ...................................................................... 4-8
VT-d ............................................................................................................ 4-8
Active State Power Management ............................................................... 4-8
PCIE Maximum Payload Size .................................................................... 4-8
PCI Express Port ........................................................................................ 4-8
PEG Force Gen1 ........................................................................................ 4-8
Detect Non-Compliant Device .................................................................... 4-8
 South Bridge Configuration ..................................................................... 4-8
GbE Controller ............................................................................................ 4-8