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X10SRi-F User’s Manual

Notes

Summary of Contents for X10SRi-F

Page 1: ...X10SRi F USER S MANUAL Revision 1 0b...

Page 2: ...ts for a class B digital device pursuant to Part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipmen...

Page 3: ...d and serviced by profes sional technicians Manual Organization Chapter 1 describes the features specifications and performance of the mother board and provides detailed information on the Intel C612...

Page 4: ...should be given to the following symbols for proper system instal lation Warning Critical information given to prevent damage to the components or injury to yourself Note Additional Information provi...

Page 5: ...dress Super Micro Computer B V Het Sterrenbeeld 28 5215 ML s Hertogenbosch The Netherlands Tel 31 0 73 6400390 Fax 31 0 73 6416525 Email sales supermicro nl General Information support supermicro nl T...

Page 6: ...ert 1 10 1 5 ACPI Features 1 11 Slow Blinking LED for Suspend State Indicator 1 11 1 6 Power Supply 1 11 1 7 Super I O 1 12 Chapter 2 Installation 2 1 Standardized Warning Statements 2 1 Battery Handl...

Page 7: ...l UID LED 2 23 Power Fail LED 2 23 Reset Button 2 24 Power Button 2 24 2 7 Connecting Cables 2 25 ATX Main PWR CPU PWR Connectors J24 JPWR1 2 25 Fan Headers Fan 1 Fan 5 Fan A 2 26 Chassis Intrusion JL...

Page 8: ...Frequently Asked Questions 3 4 3 4 Battery Removal and Installation 3 5 Battery Removal 3 5 Proper Battery Disposal 3 5 Battery Installation 3 5 3 5 Returning Merchandise for Service 3 6 Chapter 4 BIO...

Page 9: ...Power Loss 4 6 CPU Configuration 4 6 CPU Configuration 4 6 Clock Spread Spectrum 4 6 Hyper Threading ALL 4 7 Execute Disable Bit Available if supported by the OS the CPU 4 7 PPIN Control 4 7 Hardware...

Page 10: ...4 18 PCH DMI ASPM 4 18 SATA Configuration 4 18 SATA Controller 4 19 Configure SATA as 4 19 Support Aggressive Link Power Management 4 19 If the item above Configure SATA as is set to IDE the following...

Page 11: ...ption ROM 4 25 VGA Priority 4 25 Network Stack 4 26 Super IO Configuration 4 26 Serial Port 1 Configuration Serial Port 2 Configuration 4 26 Serial Port 1 Serial Port 2 4 26 Device Settings 4 26 Chang...

Page 12: ...34 Erase Event Log 4 34 When Log is Full 4 34 SMBIOS Event Log Standard Settings 4 34 Log System Boot Event 4 34 MECI Multiple Event Count Increment 4 34 METW Multiple Event Count Time Window 4 34 Vi...

Page 13: ...As User Defaults 4 42 Restore User Defaults 4 42 Boot Override 4 42 Appendix A BIOS Error Beep Codes A 1 BIOS Error Beep Codes A 1 Appendix B Software Installation Instructions B 1 Installing Software...

Page 14: ...xiv X10SRi F User s Manual Notes...

Page 15: ...otherboard If anything listed here is damaged or missing contact your retailer The following items are included in the retail box One 1 Supermicro Motherboard Six 6 SATA cables One 1 I O shield One 1...

Page 16: ...ard Image Note All graphics shown in this manual were based upon the latest PCB Revision available at the time of publishing of the manual Your motherboard or components may or may not look exactly th...

Page 17: ...4 I SATA0 I SATA1 I SATA2 I SATA3 S SATA0 S SATA1 S SATA2 I SATA5 SP1 1 2 ENABLE 2 3 DISABLE JPB1 BMC CPU CPU SLOT5 PCI E 3 0 X4 IN X8 CPU SLOT4 PCI E 3 0 X8 CPU SLOT3 PCI E 3 0 X8 JPME2 2 3 ME MANUFA...

Page 18: ...R1 JUIDB1 LE1 LE2 LEDM1 JBT1 BT1 FAN4 FAN1 FAN2 FAN3 FANA FAN5 J24 JPI2C1 JSTBY1 S SATA3 I SATA4 I SATA0 I SATA1 I SATA2 I SATA3 S SATA0 S SATA1 S SATA2 I SATA5 SP1 1 2 ENABLE 2 3 DISABLE JPB1 BMC CPU...

Page 19: ...UID Unit Identifier Switch LAN1 LAN2 Gigabit RJ45 Ports LAN1 2 IPMI_LAN IPMI_Dedicated LAN I SATA0 5 S SATA0 3 Intel PCH Serial ATA SATA 3 0 Ports 0 1 6Gb sec PCH Slots 1 2 PCI Express 2 0 Slots Slot...

Page 20: ...O Devices SATA Connections SATA 3 0 6Gb s Ten 10 SATA3 ports AHCI controller supports six 6 SATA3 drives compatible with RAID 0 1 5 10 sSATA controller supports four 4 SATA3 drives compatible with RAI...

Page 21: ...em overheat LED and control CPU Thermal Trip support Thermal Monitor 2 TM2 support vPro 9 0 AMT 9 0 support Fan Control Fan status monitoring with firmware 4 pin fan speed con trol via IPMI interface...

Page 22: ...RTL8211E VB CG 3 2 RJ45 BIOS SPI SPI Temp Sensor EMC1402 1 2 at diff SMBUS TPM HEADER USB 3 0 USB BIOS HEADER SPI AST2400 BMC 5 6 7 RMII NCSI COM1 Connector COM2 Header VGA CONN BMC Boot Flash DDR3 5...

Page 23: ...MI for chip to chip true isochronous communication providing up to 5 Gb s of software transparent data transfer rate on each read write direction In addition the X10SRi F also features a TCO timer whi...

Page 24: ...ust the voltage thresholds to define the sensitivity of the voltage monitor Environmental Temperature Control The thermal control sensor monitors the CPU temperature in real time and will turn on the...

Page 25: ...n the user presses any key the CPU will wake up and the LED will automatically stop blinking and remain on 1 6 Power Supply As with all computer products a stable power source is necessary for proper...

Page 26: ...rammable baud rate generator complete modem control capability and a processor interrupt system Both UARTs provide legacy speed with baud rate of up to 115 2 Kbps as well as an advanced speed with bau...

Page 27: ...omponents Read this section in its entirety before installing or configuring components in the Supermicro chassis Battery Handling Warnung Bei Einsetzen einer falschen Batterie besteht Explosionsgefah...

Page 28: ...n si la bater a se reemplaza de manera incorrecta Re emplazar la bater a exclusivamente con el mismo tipo o el equivalente recomen dado por el fabricante Desechar las bater as gastadas seg n las inst...

Page 29: ...dieses Produkts sollte gem allen Bestimmungen und Gesetzen des Landes erfolgen Advertencia Al deshacerse por completo de este producto debe seguir todas las leyes y regla mentos nacionales Attention L...

Page 30: ...ntacts When handling chips or modules avoid touching their pins Put the motherboard and peripherals back into their antistatic bags when not in use For grounding purposes make sure your computer chass...

Page 31: ...DIMMD2 DIMMD1 DIMMC1 IPMI_LAN UID USB11 3 0 0N POWER FORCE ON JPL1 LAN1 2 1 2 ENABLE VGA 2 3 DISABLE LGA2011 3 1 1 CPU SLOT6 PCI E 3 0 X16 BAR CODE IPMI CODE MAC CODE BIOS LICENSE BIOS Caution 1 To av...

Page 32: ...fs in the chassis as needed 5 Install the motherboard into the chassis carefully to avoid damaging other motherboard components 6 Using the Phillips screwdriver insert a Phillips head 6 screw into a m...

Page 33: ...at you use an Intel certified multi directional heatsink only Make sure to install the motherboard into the chassis before you install the CPU heatsink When receiving a motherboard without a processor...

Page 34: ...om its locking position 3 With the lever labeled Close 1st fully retracted gently push down on the lever labelled Open 1st to open the load plate Lift the load plate to open it completely OPEN1st WARN...

Page 35: ...ket Do not drop the CPU on the socket Do not move the CPU horizontally or vertically Do not rub the CPU against the surface or against any pins of the socket to avoid damaging the CPU or the socket So...

Page 36: ...ose the load plate with the CPU inside the socket Lock the lever labelled Close 1st first then lock the lever labelled Open 1st second Using your thumb gently push the load levers down to the lever lo...

Page 37: ...board s and the Heatsink Bracket under neath 3 Screw in two diagonal screws i e the 1 and the 2 screws until just snug do not over tighten the screws to avoid possible damage to the CPU 4 Finish the i...

Page 38: ...rboard in the sequence as shown in the illustration below 2 Gently wriggle the heatsink to loosen it from the CPU Do not use excessive force when wriggling the heatsink 3 Once the heatsink is loosened...

Page 39: ...ID USB11 3 0 0N POWER FORCE ON JPL1 LAN1 2 1 2 ENABLE VGA 2 3 DISABLE LGA2011 3 1 1 CPU SLOT6 PCI E 3 0 X16 BAR CODE IPMI CODE MAC CODE BIOS LICENSE BIOS 2 5 Installing DDR4 Memory Note Check the Supe...

Page 40: ...mory which will improve memory performance Please refer to the table on the next page Notes Be sure to use memory modules of the same type and speed on the same motherboard Mixing of memory modules of...

Page 41: ...ware Hub flash memory System BIOS 1 MB 3 99 Local APIC 4 KB 3 99 Area Reserved for the chipset 2 MB 3 99 I O APIC 4 Kbytes 4 KB 3 99 PCI Enumeration Area 1 256 MB 3 76 PCI Express 256 MB 256 MB 3 51 P...

Page 42: ...3 0 HDD NIC 1 JWD1 Watch Dog 1 2 RST 2 3 NMI LAN1 DIMMA2 DIMMA1 USB10 3 0 FF 2 NIC OH LAN2 RST PWR PWR FAIL USB4 5 ON 1 2 ENABLE 2 3 DISABLE JPG1 VGA JI2C1 JI2C2 I2C bus for PCI E slot OFF DISABLE ON...

Page 43: ...SLOT6 PCI E 3 0 X16 BAR CODE IPMI CODE MAC CODE BIOS LICENSE BIOS A Backpanel USB 2 0 0 1 B Backpanel USB 3 0 2 3 C Front Panel USB 2 0 4 5 D Front Panel USB 2 0 6 7 E Front Panel USB 2 0 8 9 F Front...

Page 44: ...2 0 X2 IN X8 COM2 COM1 DIMMB2 DIMMB1 PWR I2C DIMMD2 DIMMD1 DIMMC1 IPMI_LAN UID USB11 3 0 0N POWER FORCE ON JPL1 LAN1 2 1 2 ENABLE VGA 2 3 DISABLE LGA2011 3 1 1 CPU SLOT6 PCI E 3 0 X16 BAR CODE IPMI CO...

Page 45: ...OM1 DIMMB2 DIMMB1 PWR I2C DIMMD2 DIMMD1 DIMMC1 IPMI_LAN UID USB11 3 0 0N POWER FORCE ON JPL1 LAN1 2 1 2 ENABLE VGA 2 3 DISABLE LGA2011 3 1 1 CPU SLOT6 PCI E 3 0 X16 BAR CODE IPMI CODE MAC CODE BIOS LI...

Page 46: ...SB4 5 ON 1 2 ENABLE 2 3 DISABLE JPG1 VGA JI2C1 JI2C2 I2C bus for PCI E slot OFF DISABLE ON ENABLE PCH SLOT2 PCI E 2 0 X4 IN X8 PCH SLOT1 PCI E 2 0 X2 IN X8 COM2 COM1 DIMMB2 DIMMB1 PWR I2C DIMMD2 DIMMD...

Page 47: ...2 3 DISABLE JPG1 VGA JI2C1 JI2C2 I2C bus for PCI E slot OFF DISABLE ON ENABLE PCH SLOT2 PCI E 2 0 X4 IN X8 PCH SLOT1 PCI E 2 0 X2 IN X8 COM2 COM1 DIMMB2 DIMMB1 PWR I2C DIMMD2 DIMMD1 DIMMC1 IPMI_LAN UI...

Page 48: ...OM2 COM1 DIMMB2 DIMMB1 PWR I2C DIMMD2 DIMMD1 DIMMC1 IPMI_LAN UID USB11 3 0 0N POWER FORCE ON JPL1 LAN1 2 1 2 ENABLE VGA 2 3 DISABLE LGA2011 3 1 1 CPU SLOT6 PCI E 3 0 X16 BAR CODE IPMI CODE MAC CODE BI...

Page 49: ...OM2 COM1 DIMMB2 DIMMB1 PWR I2C DIMMD2 DIMMD1 DIMMC1 IPMI_LAN UID USB11 3 0 0N POWER FORCE ON JPL1 LAN1 2 1 2 ENABLE VGA 2 3 DISABLE LGA2011 3 1 1 CPU SLOT6 PCI E 3 0 X16 BAR CODE IPMI CODE MAC CODE BI...

Page 50: ...ition 3 Reset 4 Ground DESIGNED IN USA 1 01 REV X10SRi F JP3 JTPM1 JF1 JD1 J23 T SGPIO1 T SGPIO2 T SGPIO3 JOH1 JL1 JPME2 JWD1 JPG1 JPB1 1 JI2C2 JI2C1 JBR1 JVRM2 JVRM1 JPL1 JSD1 JSD2 JIPMB1 JPWR1 JUIDB...

Page 51: ...2 DIMMD1 DIMMC1 IPMI_LAN UID USB11 3 0 0N POWER FORCE ON JPL1 LAN1 2 1 2 ENABLE VGA 2 3 DISABLE LGA2011 3 1 1 CPU SLOT6 PCI E 3 0 X16 BAR CODE IPMI CODE MAC CODE BIOS LICENSE BIOS 2 7 Connecting Cable...

Page 52: ...DIMMB1 PWR I2C DIMMD2 DIMMD1 DIMMC1 IPMI_LAN UID USB11 3 0 0N POWER FORCE ON JPL1 LAN1 2 1 2 ENABLE VGA 2 3 DISABLE LGA2011 3 1 1 CPU SLOT6 PCI E 3 0 X16 BAR CODE IPMI CODE MAC CODE BIOS LICENSE BIOS...

Page 53: ...N2 RST PWR PWR FAIL USB4 5 ON 1 2 ENABLE 2 3 DISABLE JPG1 VGA JI2C1 JI2C2 I2C bus for PCI E slot OFF DISABLE ON ENABLE PCH SLOT2 PCI E 2 0 X4 IN X8 PCH SLOT1 PCI E 2 0 X2 IN X8 COM2 COM1 DIMMB2 DIMMB1...

Page 54: ...H LAN2 RST PWR PWR FAIL USB4 5 ON 1 2 ENABLE 2 3 DISABLE JPG1 VGA JI2C1 JI2C2 I2C bus for PCI E slot OFF DISABLE ON ENABLE PCH SLOT2 PCI E 2 0 X4 IN X8 PCH SLOT1 PCI E 2 0 X2 IN X8 COM2 COM1 DIMMB2 DI...

Page 55: ...1 JI2C2 I2C bus for PCI E slot OFF DISABLE ON ENABLE PCH SLOT2 PCI E 2 0 X4 IN X8 PCH SLOT1 PCI E 2 0 X2 IN X8 COM2 COM1 DIMMB2 DIMMB1 PWR I2C DIMMD2 DIMMD1 DIMMC1 IPMI_LAN UID USB11 3 0 0N POWER FORC...

Page 56: ...BLE PCH SLOT2 PCI E 2 0 X4 IN X8 PCH SLOT1 PCI E 2 0 X2 IN X8 COM2 COM1 DIMMB2 DIMMB1 PWR I2C DIMMD2 DIMMD1 DIMMC1 IPMI_LAN UID USB11 3 0 0N POWER FORCE ON JPL1 LAN1 2 1 2 ENABLE VGA 2 3 DISABLE LGA20...

Page 57: ...C1 JI2C2 I2C bus for PCI E slot OFF DISABLE ON ENABLE PCH SLOT2 PCI E 2 0 X4 IN X8 PCH SLOT1 PCI E 2 0 X2 IN X8 COM2 COM1 DIMMB2 DIMMB1 PWR I2C DIMMD2 DIMMD1 DIMMC1 IPMI_LAN UID USB11 3 0 0N POWER FOR...

Page 58: ...for PCI E slot OFF DISABLE ON ENABLE PCH SLOT2 PCI E 2 0 X4 IN X8 PCH SLOT1 PCI E 2 0 X2 IN X8 COM2 COM1 DIMMB2 DIMMB1 PWR I2C DIMMD2 DIMMD1 DIMMC1 IPMI_LAN UID USB11 3 0 0N POWER FORCE ON JPL1 LAN1 2...

Page 59: ...2C1 JI2C2 I2C bus for PCI E slot OFF DISABLE ON ENABLE PCH SLOT2 PCI E 2 0 X4 IN X8 PCH SLOT1 PCI E 2 0 X2 IN X8 COM2 COM1 DIMMB2 DIMMB1 PWR I2C DIMMD2 DIMMD1 DIMMC1 IPMI_LAN UID USB11 3 0 0N POWER FO...

Page 60: ...RST PWR PWR FAIL USB4 5 ON 1 2 ENABLE 2 3 DISABLE JPG1 VGA JI2C1 JI2C2 I2C bus for PCI E slot OFF DISABLE ON ENABLE PCH SLOT2 PCI E 2 0 X4 IN X8 PCH SLOT1 PCI E 2 0 X2 IN X8 COM2 COM1 DIMMB2 DIMMB1 P...

Page 61: ...ABLE ON ENABLE PCH SLOT2 PCI E 2 0 X4 IN X8 PCH SLOT1 PCI E 2 0 X2 IN X8 COM2 COM1 DIMMB2 DIMMB1 PWR I2C DIMMD2 DIMMD1 DIMMC1 IPMI_LAN UID USB11 3 0 0N POWER FORCE ON JPL1 LAN1 2 1 2 ENABLE VGA 2 3 DI...

Page 62: ...DISABLE LGA2011 3 1 1 CPU SLOT6 PCI E 3 0 X16 BAR CODE IPMI CODE MAC CODE BIOS LICENSE BIOS A LAN 1 2 LEDs B IPMI_LAN LED B LAN 1 LAN 2 LEDs Two LAN ports LAN 1 LAN 2 are located on the I O backplane...

Page 63: ...ABLE 2 3 DISABLE JPG1 VGA JI2C1 JI2C2 I2C bus for PCI E slot OFF DISABLE ON ENABLE PCH SLOT2 PCI E 2 0 X4 IN X8 PCH SLOT1 PCI E 2 0 X2 IN X8 COM2 COM1 DIMMB2 DIMMB1 PWR I2C DIMMD2 DIMMD1 DIMMC1 IPMI_L...

Page 64: ...bus for PCI E slot OFF DISABLE ON ENABLE PCH SLOT2 PCI E 2 0 X4 IN X8 PCH SLOT1 PCI E 2 0 X2 IN X8 COM2 COM1 DIMMB2 DIMMB1 PWR I2C DIMMD2 DIMMD1 DIMMC1 IPMI_LAN UID USB11 3 0 0N POWER FORCE ON JPL1 L...

Page 65: ...ents 2 Make sure that there are no short circuits between the motherboard and chassis 3 Disconnect all ribbon wire cables from the motherboard including those for the keyboard and mouse Also be sure t...

Page 66: ...nded that you use the memory modules of the same type and speed for all DIMMs in the system Do not use memory modules of different sizes different speeds and different types on the same motherboard 3...

Page 67: ...be downloaded from our website at http www supermi cro com support bios Note Not all BIOS can be flashed Some cannot be flashed it depends on the boot block code of the BIOS 3 If you ve followed the i...

Page 68: ...le device or USB pen thumb drive Use the following format F flash bat BIOS ROM filename xxx Enter Note Always use the file named flash bat to update the BIOS and insert a space between flash bat and t...

Page 69: ...damage the battery in any way a damaged battery may release hazardous materials into the environment Do not discard a used battery in the garbage or a public landfill Please comply with the regulatio...

Page 70: ...permicro com RmaForm When you return the motherboard to the manufacturer the RMA number should be prominently displayed on the outside of the shipping carton and mailed prepaid or hand carried Shippin...

Page 71: ...t can be configured Grayed out options cannot be configured Options in blue can be configured by the user The right frame displays the key legend Above the key legend is an area reserved for a text me...

Page 72: ...r system has a BIOS related issue Flashing the wrong BIOS can cause irreparable damage to the system In no event shall Supermicro be liable for direct indirect special incidental or consequential dam...

Page 73: ...e is entered in HH MM SS format Note The time is in the 24 hour format For example 5 30 P M appears as 17 30 00 Supermicro X10SRI F BIOS Version This item displays the version of the BIOS ROM used in...

Page 74: ...this feature to select the screen between displaying POST messages or the OEM logo at bootup Select Disabled to display the POST messages Select En abled to display the OEM logo instead of the normal...

Page 75: ...iguration DeepSx Power Policies Use this item to configure the Advanced Configuration and Power Interface ACPI settings for the system Enable S3 to use Standby Mode Suspend to RAM and maintain power s...

Page 76: ...n Warning Setting the wrong values in the following sections may cause the system to malfunction CPU Configuration The following CPU information will be displayed Processor Socket Processor ID Process...

Page 77: ...streams of data and instructions from the main memory to the Level 2 L2 cache to improve CPU performance The options are Disable and Enable Adjacent Cache Line Prefetch Available when supported by the...

Page 78: ...cal processor thread is assigned 256 APIC IDs APIDs in 8 bit bandwidth When this item is set to En able the APIC ID will be expanded from 8 bits to 16 bits to provide 512 APIDs to each thread to enhan...

Page 79: ...ate Coordination Use this item to configure the processor s P State coordination settings During a P State the voltage and frequency of the processor will be reduced when it is in operation This makes...

Page 80: ...ng The options are Enable and Disable Energy Performance BIAS Setting This feature allows balancing Power Efficiency vs Performance This will override whatever setting is in the Operating System The o...

Page 81: ...on power is maintained The default setting is 0 Package Clamping Limit1 Use this item to set the limit on power performance states for the run time proces sor with P0 being the state with the highest...

Page 82: ...action setting for a PCI E port specified by the user The options are Gen 1 2 5GT s Gen 2 5 GT s and Gen 3 8GT s CPU SLOT4 PCI E 3 0 X8 This item configures the PCI E port Bifuraction setting for a PC...

Page 83: ...ross Intel platforms providing greater reliability security and availability in networking and data sharing The options are Enable and Disable Interrupt Remapping Select Enable for Interrupt Remapping...

Page 84: ...r On Die support to enhance system performance in cloud computing The options are Enabled and Disabled Early Snoop Available when the OS and the CPU support this feature Select Enabled for Early Snoop...

Page 85: ...power limit baseline for DRAM modules The options are Disable DRAM RAPL Mode 0 and DRAM RAPL Mode 1 Set Throttling Mode Throttling improves reliability and reduces power consumption in the proces sor...

Page 86: ...rt for x4 DIMM modules The options are Auto Disabled and Enabled Memory Rank Sparing This item indicates if memory rank sparing is supported by the motherboard Memory rank sparing enhances system memo...

Page 87: ...support device tagging The options are Disable and Enable South Bridge The following South Bridge information will display USB Configuration USB Module Version USB Devices Legacy USB Support Select En...

Page 88: ...EHCI2 Select Enabled to enable EHCI Enhanced Host Controller Interface support on USB 2 0 connector 2 at least one USB 2 0 connector should be enabled for EHCI support The options are Disabled and En...

Page 89: ...ill put the link in a low power mode during extended periods of I O inactivity and will return the link to an active state when I O activity resumes The options are Enabled and Disabled SATA Port 0 Po...

Page 90: ...the item above Configure SATA as is set to RAID the following items will display Support Aggressive Link Power Management When this item is set to Enabled the SATA AHCI controller manages the power us...

Page 91: ...following items sSATA Controller This item enables or disables the onboard SATA controller supported by the Intel SCU chip The options are Enabled and Disabled Configure sSATA as Select IDE to configu...

Page 92: ...drive or a Hard Disk Drive The options are Hard Disk Drive and Solid State Drive If the item above Configure sSATA as is set to IDE the following items will display sSATA Port 0 Port 3 This item indi...

Page 93: ...tem to Enabled for hot plugging support which will allow the user to replace an sSATA drive without shutting down the system The options are Enabled and Disabled sSATA Port 0 Port 3 Spin Up Device On...

Page 94: ...Above 4G Decoding Available if the system supports 64 bit PCI decoding Select Enabled to decode a PCI device that supports 64 bit in the space above 4G Address The options are Enabled and Disabled SR...

Page 95: ...M CPU SLOT2 PCI E 3 0 x4 in x8 OPROM CPU SLOT3 PCI E 3 0 x8 OPROM CPU SLOT4 PCI E 3 0 x8 OPROM CPU SLOT5 PCI E 3 0 x4 in x8 OPROM CPU SLOT6 PCI E 3 0 x16 OPROM Select Enabled to enable Option ROM supp...

Page 96: ...for the BIOS to automatically assign the base I O and IRQ address to a serial port specified The options for Serial Port 1 are Auto IO 3F8h IRQ 4 IO 3F8h IRQ 3 4 5 6 7 9 10 11 12 IO 2F8h IRQ 3 4 5 6 7...

Page 97: ...s to detect data transmission errors Select Even if the parity bit is set to 0 and the number of 1 s in data bits is even Select Odd if the parity bit is set to 0 and the number of 1 s in data bits is...

Page 98: ...er legacy Console Redirection is disabled before booting the OS When set to Always Enable legacy Console Redirection remains enabled when booting the OS The options are Always Enable and Bootloader SO...

Page 99: ...nt along with the data bits Select Space to add a Space as a parity bit to be sent with your data bits The options are None Even Odd Mark and Space Stop Bits A stop bit indicates the end of a serial d...

Page 100: ...nd Serial Port management EMS Emergency Management Services Console Redirection Select Enabled to use a COM port selected by the user for EMS Console Redirec tion The options are Enabled and Disabled...

Page 101: ...d detected by the BIOS Configuration Security Device Support If this feature and the TPM jumper on the motherboard are both set to Enabled onboard security devices will be enabled for TPM support to e...

Page 102: ...elect Enabled to activate the High Precision Event Timer HPET that produces periodic interrupts at a much higher frequency than a Real time Clock RTC does in synchronizing multimedia streams providing...

Page 103: ...Error Logging The options are Enable and Dis able If this item is set to Enable the following item will be available for configuration Memory Corrected Error Enabling Available when the item above Ru...

Page 104: ...System Boot Event Select Enabled to log system boot events The options are Disabled and Enabled MECI Multiple Event Count Increment Enter the increment value for the multiple event counter Enter a num...

Page 105: ...ed in your system System Event Log Enabling Disabling Options SEL Components Select Enabled for all system event logging at bootup The options are Enabled and Disabled Erasing Settings Erase SEL Selec...

Page 106: ...Address Source Use this item to select the source of the IP address for this computer If Static is selected you will need to know the IP address of this computer and enter it to the system manually i...

Page 107: ...Chapter 4 AMI BIOS 4 37 Gateway IP Address This item displays the Gateway IP address for this computer This should be in decimal and in dotted quad form i e 192 168 10 253...

Page 108: ...stem to check for a password at Setup Select Always for the system to check for a password at bootup or upon entering the BIOS Setup utility The options are Setup and Always Administrator Password Use...

Page 109: ...to wait indefinitely The default setting is 1 Boot Mode Select Use this item to select the type of device that the system is going to boot from The options are Legacy UEFI and Dual The default setting...

Page 110: ...is used to specify the path to the driver that the new boot option is added to The format for the path is fsx path filename efi Boot Option File Path Create After the driver option name and the file...

Page 111: ...the Save Exit tab from the BIOS setup screen to configure the settings below Discard Changes and Exit Select this option to quit the BIOS setup without making any permanent changes to the system conf...

Page 112: ...ned for maximum system performance but not for maximum stability Save As User Defaults To set this feature select Save as User Defaults from the Exit menu and press En ter This enables the user to sav...

Page 113: ...rror oc curs you should consult with your system manufacturer for possible repairs These fatal errors are usually communicated through a series of audible beeps The numbers on the fatal error list cor...

Page 114: ...A 2 X10SRi F User s Manual Notes...

Page 115: ...you may down load individual drivers and utilities After creating a CD DVD with the ISO files insert the disk into the CD DVD drive on your system and the display shown below should appear Note 1 Clic...

Page 116: ...ocal and remote management versions and can be used with Nagios to maximize your system monitoring needs With SuperDoctor 5 Man agement Server SSM Server you can remotely control power on off and rese...

Page 117: ...otup C 2 How to Recover the UEFI BIOS Image A UEF BIOS flash chip consists of a recovery BIOS block comprised of two boot blocks and a main BIOS block a main BIOS image The boot block contains critica...

Page 118: ...ur driver disk visit our website at www supermicro com to download the BIOS image into a USB flash device and rename it Super ROM for BIOS recovery use 2 Insert the USB device that contains the new BI...

Page 119: ...ry is complete press any key to reboot the system 7 Using a different system extract the BIOS package into a bootable USB flash drive 8 When a DOS prompt appears enter FLASH BAT BIOSname at the prompt...

Page 120: ...from the power supply to clear CMOS and then plug the AC power cable in the power supply again to power on the system 10 Press Del continuously to enter the BIOS Setup utility 11 Press F3 to load def...

Page 121: ...rtup A USB flash drive with FAT32 file system and Super ROM stored are required and the USB flash drive does not need to be bootable IPMI firmware that is capable of supporting BIOS Resilience functio...

Page 122: ...gh the IPMI GUI browser follow the instructions below 1 After the IPMI GUI browser log in click on the Miscellaneous tab then BIOS Resilience then the Resile button 2 IPMI prints out a message that in...

Page 123: ...3 Click on the Remote Control tab then Console Redirection then the Launch Console button to open the Java iKVM Viewer 4 In the Java iKVM Browser click on the Virtual Media tab then Virtual Stor age t...

Page 124: ...Device1 tab then Logical Drive Type drop down menu then select the USB flash drive with Super ROM Click Plug In then OK 6 Click on the Remote Control tab then Power Control then check the Power On Se...

Page 125: ...h drive which was mounted earlier If Super ROM is found the on duty boot block boots to it and finishes the rest of the POST processes The system will automatically enter the BIOS recovery flash page...

Page 126: ...Manual 9 A message box will appear to indicate the BIOS recovery flash process is complete Press ENTER to finish The system will do a power cycle to deacti vate the dual boot block feature and produce...

Page 127: ...PMI Command Sets follow the instructions below 1 After the IPMI GUI browser log in click on the Remote Control tab then Console Redirection then the Launch Console button to open Java iKVM Viewer 2 Op...

Page 128: ...mmand prompt impi raw 30 70 C3 D5 4 Mount the USB flash drive with Super ROM to remote Virtual Media Device 1 This must de done in the IPMI Shell mode To enter the IPMI Shell mode type shell To see th...

Page 129: ...the USB flash drive which are the same as Steps 7 9 in Section D 1 User Approach Dual Boot Block is not designed for an automatic operation non user attended op eration The feature offers an immediate...

Page 130: ...D 10 X10SRi F User s Manual Notes...

Page 131: ...expected to result in significant injury or loss of life or catastrophic property damage Accordingly Supermicro disclaims any and all liability and should buyer use or sell such products for use in su...

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