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2-22
PDSBA-Q+/PDSBA+/PDSBA/PDSBE User's Manual
S
U
P
E
R
P
D
S
B
A
+
®
Processor
JPWAKE
4-PinPWR
KB/MS
USB3/4/5/6
USB1/2
LAN
Fa
n3
Clock
Intel
North Bridge
PCI-E x1
PCI-E x16
PCI-E x4
PCI-33MHz
LAN
CTRL
JP
L1
COM2
FWH
JL1
JW
OR
I-SATA0
I-SATA1
F
P
C
T
R
L
F
an
2
Buzzer
24
-P
in
A
T
X
P
W
R
S
up
er
I
O
Fa
n1
/C
P
U
F
an
Intel
J44
D
IM
M
#1
A
(
B
lu
e)
D
IM
M
#2
A
(
B
la
ck
)
D
IM
M
#1
B
(
B
lu
e)
D
IM
M
#2
B
(
B
la
ck
)
F
lo
pp
y
A
ud
io
WOL
J B T 1
South Bridge
J12
Battery
JPUSB1
JPUSB2
CO
M
1
JFSB1
JFSB2
Slot7
Slot6
Slot5
Slot4
JI
2
C1
JI
2
C2
PCI-33MHz
Slot3
PCI-33MHz
Slot2
Slot1
PCI-33MHz
J 9
I-SATA4
I-SATA5
RAIDLED
USB7/8
J45
USB9/10
LE1
JLED
JWD
CD1
P
ar
al
le
l
P
or
t
V
G
A
HDA
IDE#2
IDE#1
ITE
JP2
JP3
IDE Enable/Disable (*PDSBA-
Q+/PDSBA+ only)
JP2 enables or disables IDE#1 and
IDE#2 on the motherboard. See the
table on the right for jumper settings.
The default setting is enabled.
IDE Enable
Pin# Definition
1-2
Enabled (*default)
2-3
Disabled
TPM Enable (*PDSBA/PDSBA-
Q+/PDSBA+ only)
JP3 enables or disables Trust Platform
Module (Management) on the mother-
board. See the table on the right for
jumper settings. The default setting
is enabled.
TPM Enable
Pin# Definition
1-2
Enabled (*default)
2-3
Disabled
A
B
A. IDE Enable
B. TPM Enable
Summary of Contents for PDSBA+
Page 1: ...PDSBA Q PDSBA PDSBA PDSBE USER S MANUAL Revision 1 1c...
Page 5: ...Preface v Notes...
Page 54: ...3 6 PDSBA Q PDSBA PDSBA PDSBE User s Manual Notes...
Page 80: ...A 2 PDSBA Q PDSBA PDSBA PDSBE User s Manual Notes...
Page 82: ...B 2 PDSBA Q PDSBA PDSBA PDSBE User s Manual Notes...
Page 86: ...C 4 PDSBA Q PDSBA PDSBA PDSBE User s Manual Notes...