Supero H8QG6-F User Manual Download Page 80

B-2

H8DGU(-F) Serverboard User’s Manual

B-2  Bootblock Recovery Codes

The bootblock recovery checkpoint codes are listed in order of execution:

Checkpoint

Code Description

E0h

The onboard fl oppy controller if available is initialized. Next, beginning the base 512 KB 
memory test.

E1h

Initializing the interrupt vector table next.

E2h

Initializing the DMA and Interrupt controllers next.

E6h

Enabling the fl oppy drive controller and Timer IRQs. Enabling internal cache memory.

Edh

Initializing the fl oppy drive.

Eeh

Looking for a fl oppy diskette in drive A:. Reading the fi rst sector of the diskette.

Efh

A read error occurred while reading the fl oppy drive in drive A:.

F0h

Next, searching for the AMIBOOT.ROM fi le in the root directory.

F1h

The AMIBOOT.ROM fi le is not in the root directory.

F2h

Next, reading and analyzing the fl oppy diskette FAT to fi nd the clusters occupied by the 
AMIBOOT.ROM fi le.

F3h

Next, reading the AMIBOOT.ROM fi le, cluster by cluster.

F4h

The AMIBOOT.ROM fi le is not the correct size.

F5h

Next, disabling internal cache memory.

FBh

Next, detecting the type of fl ash ROM.

FCh

Next, erasing the fl ash ROM.

FDh

Next, programming the fl ash ROM.

FFh

Flash ROM programming was successful. Next, restarting the system BIOS.

Summary of Contents for H8QG6-F

Page 1: ...H8QG6 F H8QGi F USER S MANUAL Revision 1 0a SUPER...

Page 2: ...of any such disputes Super Micro s total liability for all claims will not exceed the price paid for the hardware product FCC Statement This equipment has been tested and found to comply with the lim...

Page 3: ...fications and performance of the motherboard and provides detailed information about the chipset Chapter 2 begins with instructions on handling static sensitive devices Read this chapter when installi...

Page 4: ...iv H8QG6 i F Serverboard User s Manual Notes...

Page 5: ...nsitive Devices 1 Precautions 1 Unpacking 1 2 2 Processor and Heatsink Installation 2 2 3 Mounting the Motherboard into a Chassis 4 2 4 Installing Memory 4 DIMM Module Population Configuration 6 2 5 P...

Page 6: ...nation of Jumpers 16 CMOS Clear 16 I2C to PCI Express Slot 17 Watch Dog Enable Disable 17 VGA Enable Disable 17 LAN1 2 Enable Disable 17 SAS Enable Disable 17 USB Wake Up 18 BMC Jumper 18 2 9 Onboard...

Page 7: ...tion 2 3 2 Technical Support Procedures 3 3 3 Frequently Asked Questions 3 3 4 Returning Merchandise for Service 4 Chapter 4 BIOS 4 1 Introduction 1 4 2 Main Menu 2 4 3 Advanced Settings Menu 2 4 4 PC...

Page 8: ...Notes viii H8QG6 i F Serverboard User s Manual...

Page 9: ...with the highest standards in quality and performance Please check that the following items have all been included with your motherboard If anything listed here is damaged or missing contact your ret...

Page 10: ...ress Super Micro Computer B V Het Sterrenbeeld 28 5215 ML s Hertogenbosch The Netherlands Tel 31 0 73 6400390 Fax 31 0 73 6416525 Email sales supermicro nl General Information support supermicro nl Te...

Page 11: ...Chapter 1 Introduction 1 3 Figure 1 1 H8QG6 F Image...

Page 12: ...1 COM1 JPW1 JTPM1 UIO PCI E 2 0 X8 USB2 3 USB4 5 SATA0 SATA1 SATA2 SATA3 SATA4 SATA5 SAS1 SAS0 SAS3 SAS2 SAS4 SAS5 SAS7 SAS6 KB MOUSE IPMI LAN USB0 1 LAN1 CPU1 CPU3 CPU4 CPU2 P2 DIMM1A P2 DIMM1B P2 DI...

Page 13: ...d JPG1 VGA Enable Disable Pins 1 2 Enabled JPL1 LAN 1 2 Enable Disable Pins 1 2 Enabled JPS1 SAS Controller Enable Disable only on H8QG6 F Pins 1 2 Enabled JPUSB1 USB Wakeup Pins 1 2 Enabled JWD1 Watc...

Page 14: ...8 pin CPU Power Connectors JSMB1 System Management Bus Header SMBus JTPM1 Trusted Platform Module Header JWF1 Compact Flash Card Power Connector JWOL1 Wake On LAN Header LAN1 2 Gigabit Ethernet RJ45...

Page 15: ...one SR5670 and one SP5100 Southbridge chipset Expansion Slots Two 2 PCI Express x16 Gen 2 Two 2 PCI Express x8 Gen 2 One 1 UIO BIOS 16 Mb AMIBIOS SPI Flash ROM APM 1 2 DMI 2 3 PCI 2 2 ACPI 1 0 ACPI 2...

Page 16: ...pported Raid 5 Optional H8QG6 F only Two 2 Fast UART 16550 compatible serial port one header and one port Seven 7 USB Universal Serial Bus 2 0 ports 2x rear 4x header 1x type A Two 2 LAN ports support...

Page 17: ...M DDR3 1333 1066 USB USB PORT 0 6 SLOT 4 PCIE_ X16 LSI SAS2 2008 PCIE X4 Intel 82576 PCIE x4 AMD SP5100 Winbond WPCM450 VGA HT Link 16 16 1GHz AMD SR5670 2 DDR3 1333 1066 DDR3 1333 1066 HT Link PCIE X...

Page 18: ...a factor of up to 48x between integrated circuits This is done partly by reducing the number of buses in the chipset to reduce bottlenecks and by enabling a more efficient use of memory in multi proce...

Page 19: ...f and responds immediately to user or other requests Slow Blinking LED for Suspend State Indicator When the CPU goes into a suspend state the chassis power LED will start blinking to indicate that the...

Page 20: ...ll a power surge protector to help avoid problems caused by power surges Warning To prevent the possibility of explosion do not use the wrong type of onboard CMOS battery or install it upside down 1 7...

Page 21: ...ment 1 7 UIO The H8QG6 i F is a specially designed serverboard that features Supermicro s UIO Universal I O technology UIO serverboards have a PCI Express x4 and x8 signals that can support PCI E card...

Page 22: ...1 14 H8QG6 i F Serverboard User s Manual Notes...

Page 23: ...its components peripheral chips memory modules or gold contacts When handling chips or modules avoid touching their pins Put the motherboard and peripherals back into their antistatic bags when not i...

Page 24: ...Procedure Follow the procedures as listed below to install the motherboard into a chassis Install the processor s and the heatsink s 1 Install the motherboard in the chassis 2 Install the memory and a...

Page 25: ...the CPU horizontally or vertically or rub the CPU against the socket or against any pins of the socket which may damage the CPU and or the socket With the CPU inserted into the socket 5 inspect the f...

Page 26: ...he Tray in the Chassis Carefully mount the motherboard onto the motherboard tray by aligning the 1 motherboard mounting holes with the raised metal standoffs in the tray Insert screws into all the mou...

Page 27: ...M Only interleaved memory is supported so you must populate four DIMM slots at a time see procedure above Populating four adjacent slots at a time with memory modules of the same size and type will re...

Page 28: ...IMMS CPU Channel 1 Channel 2 Channel 3 Channel 4 16 DIMMs CPU1 P1 1A P1 2A P1 3A P1 4A CPU2 P2 1A P2 2A P2 3A P2 4A CPU3 P3 1A P3 2A P3 3A P3 4A CPU4 P4 1A P4 2A P4 3A P4 4A 32 DIMMs CPU1 P1 1A P1 1B...

Page 29: ...ailability System Device Size Physical Memory Available 4 GB Total System Memory Firmware Hub flash memory System BIOS 1 MB 3 99 GB Local APIC 4 KB 3 99 GB Area Reserved for the chipset 2 MB 3 99 GB I...

Page 30: ...assis cover 2 Install the riser card by sliding card into the appropriate riser card in the 3 motherboard Choose the PCI slot shield in which to place the add on card 4 In that slot open the PCI slot...

Page 31: ...us front control panel connectors See Figure 2 3 for the pin definitions of the various connectors Refer to Section 2 6 for details Figure 2 3 JF1 Front Control Panel Header JF1 Power Button 2 1 20 19...

Page 32: ...n Definition 13 3 3V 1 3 3V 14 12V 2 3 3V 15 COM 3 COM 16 PS_ON 4 5V 17 COM 5 COM 18 COM 6 5V 19 COM 7 COM 20 Res NC 8 PWR_OK 21 5V 9 5VSB 22 5V 10 12V 23 5V 11 12V 24 COM 12 3 3V 12V 8 pin PWR Connec...

Page 33: ...to the table on the right for pin definitions OH Fan Fail PWR Fail Blue_UID LEDPin Defi nitions JF1 Pin Definition 7 Blue_LED Cathode UID 5 5V SB 8 OH Fan Fail PWR Fail UID LED Red OH Fan Fail PWR Fai...

Page 34: ...us Headers Pin Definitions USB2 3 USB4 5 USB2 Pin Definition USB3 Pin Definition 1 5V 1 5V 2 PO 2 PO 3 PO 3 PO 4 Ground 4 Ground 5 Key 5 NC Fan Header Pin Definitions Pin Definition 1 Ground 2 12V 3 T...

Page 35: ...t Output headers provide a bus betweentheSATAcontrollerandthebackpane to provide SATA enclosure management functions Connect the appropriate cable from the backplane to the T SGPIO1 header to utilize...

Page 36: ...VCC 5V 4 Mouse KB VCC 5V 5 KB Clock 5 Mouse Clock 6 No Connection 6 No Connection VCC with 1 5A PTC current limit Power LED Speaker On the JD1 header pins 1 3 are used for power LED indication and pi...

Page 37: ...er This header is used to connect a Trusted Platform Module TPM available separately from a third party vendor A TPM is a security device that allows encryption and authentica tion of hard drives disa...

Page 38: ...he jumper is off the pins Connector Pins Jumper Setting 3 2 1 3 2 1 CMOS Clear JBT1 is used to clear CMOS which will also clear any passwords Instead of pins this jumper consists of contact pads to pr...

Page 39: ...freezes the system Jumping pins 1 2 will have WD reboot the system if a program freezes Jumping pins 2 3 will generate a non maskable interrupt for the program that has frozen See the table on the ri...

Page 40: ...unction with the USB Wake Up function in the BIOS See the table on the right for jumper settings and jumper connections the default is Enabled BMC Jumper JPB1 is used to enable or disable theBMC Baseb...

Page 41: ...D Right Color Status Definition Link Left Green Solid 100 Mb s Activity Right Amber Blinking Active UID LED LE1 A rear UID LED Indicator located at LE1 works in conjunction with the rear UID switch to...

Page 42: ...initions SATA Ports Pin Definitions SATA0 SATA5 Pin Definition 1 Ground 2 TXP 3 TXN 4 Ground 5 RXN 6 RXP 7 Ground SAS Ports Pin Definitions SAS0 SAS7 Pin Definition Pin Definition 1 Ground 2 TXP 3 TXN...

Page 43: ...alling the OS operating system and SATA RAID driver you must decide if you wish to have the operating system installed as part of a bootable RAID array or installed to a separate non RAID hard drive I...

Page 44: ...OS Setup Utlility After the Setup Utility loads Use the arrow keys to move to the Exit menu Scroll down with the arrow 1 keys to the Load Optimal Defaults setting and press Enter Select OK to confirm...

Page 45: ...ing the RAID Driver During OS Installation You may also use the procedure below to install the RAID driver during the Window s OS installation With the Windows OS installation CD in the CD ROM drive r...

Page 46: ...e icon representing your CD ROM drive Finally double click on the S Setup icon Click the icons showing a hand writing on paper to view the readme files for each item Click the computer icons to the ri...

Page 47: ...nformation such as CPU temperature system voltages and fan status See the Figure below for a display of the Supero Doctor III interface Note The default User Name and Password for SuperDoctor III is A...

Page 48: ...e at ftp ftp supermicro com utility Supero_Doctor_III You can also download the Super Doctor III User s Guide at http www supermicro com PRODUCT Manuals SDIII UserGuide pdf For Linux we recommend that...

Page 49: ...power supply 2 Make sure that no short circuits exist between the motherboard and chassis 3 Disconnect all cables from the motherboard including those for the keyboard 4 and mouse Remove all add on c...

Page 50: ...ed 1 You should be using registered ECC DDR 3 memory see next page Also 2 it is recommended that you use the same memory type and speed for all DIMMs in the system See Section 2 4 for memory details C...

Page 51: ...n be seen on the initial display when your system first boots up System configuration An example of a Technical Support form is posted on our web site Distributors For immediate assistance please have...

Page 52: ...ave instant off capabilities as long as the BIOS has control of the system When the Standby or Suspend feature is enabled or when the BIOS is not in control such as during memory count the first scree...

Page 53: ...uch as F1 F2 etc Each main BIOS menu option is described in this manual The Main BIOS screen has two main frames The left frame displays all the options that can be configured Grayed out options canno...

Page 54: ...red in HH MM SS format Please note that time is in a 24 hour format For example 5 30 A M appears as 05 30 00 and 5 30 P M as 17 30 00 4 3 Advanced Settings Menu CPU Configuration CPU Configuration Thi...

Page 55: ...is a method of addressing data on a disk drive The options are Disabled and Auto Block Multi Sector Transfer Block mode boosts IDE drive performance by increasing the amount of data transferred Only 5...

Page 56: ...ord DMA MWDMA Multi Word DMA UDMA UltraDMA S M A R T Self Monitoring Analysis and Reporting Technology SMART can help predict impending drive failures Select Auto to allow BIOS to auto detect hard dis...

Page 57: ...option is set to Disabled the serial port physically becomes unavailable Select 2F8 IRQ3 to allow the serial port to use 2F8 as its I O port address and IRQ 3 for the interrupt address Options includ...

Page 58: ...em Event Log Selecting this and pressing the Enter key will clear the BMC system event log Set LAN Configuration Use the and keys to choose the desired channel number This displays Channel Number and...

Page 59: ...your system Options include revision 1 1 and 1 4 PCI Express Configuration Relaxed Ordering Enables or Disables PCI Express Device Relaxed Ordering in the system Options include Auto Disabled or Enabl...

Page 60: ...n 1 38400 8 n 1 19200 8 n 1 and 09600 8 n 1 Flow Control Selects the flow control to be used for console redirection Options are None Hardware and Software Redirection After BIOS POST Options are Dis...

Page 61: ...pport The EHCI ownership change should be claimed by the EHCI driver Options are Enabled or Disabled Legacy USB1 1 HC Support This option Enables or Disables support for USB1 1 HC devices USB Mass Sto...

Page 62: ...ains RPM information for them Fan Speed Control Modes This submenu allows you to determine how the system will control the speed of the onboard fans The options are Full Speed FS Max Cooling Perfor ma...

Page 63: ...most PCI IDE cards Options include Auto PCI Slot 1 PCI Slot PCI Slot 3 PCI Slot 4 PCI Slot 5 and PCI Slot 6 IRQ3 IRQ15 Settings These settings specify if IRQ is available to be used by PCI PnP devices...

Page 64: ...on boot up If Enabled this display the OEM logo instead of POST messages Add On ROM Display Mode This option sets the display mode for Option ROM The options are Force BIOS or Keep Current Bootup Num...

Page 65: ...sequence from the list of available removable drives A device that is in parenthesis has been disabled in the corresponding type menu CD DVD Drives This feature allows you to specify the boot sequenc...

Page 66: ...d Disabled 4 7 Chipset Settings Menu NorthBridge Configuration Memory Configuration Channel Interleaving Selects the channel interleaving memory scheme when this function is sup ported by the processo...

Page 67: ...CC mode dynamically sets the DRAM scrub rate so all of memory is scrubbed in 8 hours DRAM ECC Enable This setting allows hardware to report and correct memory errors automati cally maintaining system...

Page 68: ...re Disabled and various times in nanoseconds and microseconds The default is 2 56us DRAM Timing Configuration DRAM Timing Config This setting specifies the DRAM timing configuration Options are Auto a...

Page 69: ...this option is set to GEN1 Setting this option to Auto will leave the port to run at the default mode OHCI EHCI HC Device Functions These settings allow you to either Enable or Disable functions for O...

Page 70: ...1 L0s L1 L0 Downstream and L0 Downstream L1 Note For ATI GFx Card M2x use L1 only For ATI GFx Card M5x use both L0s L1 Link Width Use this setting to configure the Link Width Options include Auto x1 x...

Page 71: ...pport Use this setting to Disable or Enable NP NB SB VC1 traffic support Compliance Mode Use this setting to Enable or Disable Compliance Mode for the NB SB port GPP1 GPP3b Core Settings These submenu...

Page 72: ...TXCLK Clock Gating in L1 Use this setting to Enable or Disable the TXCLK clock gating in L1 LCLK Clock Gating in L1 Use this setting to Enable or Disable the LCLK clock gating in L1 Debug Option Peer...

Page 73: ...gure the HT3 Link power state Options include Auto LS0 LS1 LS2 and LS3 Unit ID Clumping Use this setting to configure Unit ID clumping Options include Disabled Auto UnitID 2 3 UnitID B C and UnitID 2...

Page 74: ...dge Interrupt Pin This option Enables or Disables the Northbridge Interrupt Pin 4 8 Exit Menu Select the Exit tab from AMI BIOS Setup Utility screen to enter the Exit BIOS Setup screen Save Changes an...

Page 75: ...ly load the Optimal Defaults as the BIOS Settings The Optimal settings are designed for maximum system performance but may not work best for all computer applications Load Fail Safe Defaults To set th...

Page 76: ...4 24 H8QG6 i F Serverboard User s Manual Notes...

Page 77: ...should consult with your system manufacturer for possible repairs These fatal errors are usually communicated through a series of audible beeps The numbers on the fatal error list on the following pa...

Page 78: ...A 2 H8QG6 i F Serverboard User s Manual Notes...

Page 79: ...itialization code checksum will be verified D1h Initializing the DMA controller performing the keyboard controller BAT test starting memory refresh and entering 4 GB flat mode next D3h Starting memory...

Page 80: ...ooking for a floppy diskette in drive A Reading the first sector of the diskette Efh A read error occurred while reading the floppy drive in drive A F0h Next searching for the AMIBOOT ROM file in the...

Page 81: ...Initialize CMOS RAM in every boot AMIBIOS POST option was set in AMIBCP or the End key was pressed 12h Next disabling DMA controllers 1 and 2 and interrupt controllers 1 and 2 13h The video display h...

Page 82: ...ch is on Initializing data to check memory wraparound at 0 0 next 45h Data initialized Checking for memory wraparound at 0 0 and finding the total system memory size next 46h The memory wraparound tes...

Page 83: ...ular buffer next 83h The command byte was written and global data initialization has completed Checking for a locked key next 84h Locked key checking is over Checking for a memory size mismatch with C...

Page 84: ...s next A3h The soft error display has completed Setting the keyboard typematic rate next A4h The keyboard typematic rate is set Programming the memory wait states next A5h Memory wait state programmin...

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