2-10
X7DBR-8/X7DBR-i User's Manual
®
S
UPER X7DBR-8/i
Fan1
8-pin PWR
FP Ctrl
IDE1
Floppy
SATA1
SATA0
USB2/3
SMB
Battery
North Bridge
20-pin ATX Main PWR
JPG1
SCSI
CTRLR
CPU1
South
Bridge
JAR
PWR
SMB
Fan2
Compact Flash
JCF1
JWF1
JL1
PCI-X 100MHz
USB4/5
WOL
D
A1
DIMM 4A
DIMM 4B
KB
MS
USB0/1
COM1
GLAN2
GLAN1
JI
2
C1
E2x8
SXB-
VG
A
SCSI Chann. B
JWD
SATA3
SATA2
SATA5
SATA4
Fan5
Fan4
Fan3
4-pin
PWR
3rd PWR
Fail
Buzzer
JPWF
Bank4
Bank3
E3x8
SXB-
JPL1
JPL2
JPA1
LVD/SE
U320
WOR
Chan A
U320 SCSI
JBT1
GLAN
CTRLR
VGA
CTRLR
BIOS
DA2
DIMM 3A
DIMM 3B
DIMM 2A
DIMM 2B
Bank2
Bank1
DIMM 1A
DIMM 1B
CPU2
SIMSO
COM2
PCI-X 100MHz ZCR
SXB- E2x8
JI
2
C2
PWLED SPK
LE1
JOH1
J7
D
A
7
SGPIO1
SGPIO2
S I/O
JPA2
JPA3
Power Button
OH/Fan Fail LED
1
NIC1 LED
Reset Button
2
HDD LED
Power LED
Reset
PWR
Vcc
Vcc
Vcc
Vcc
Ground
Ground
19
20
Vcc
X
Ground
NMI
X
Vcc
PWR Fail LED
NIC2 LED
Power LED
The Power LED connection is located
on pins 15 and 16 of JF1. Refer to the
table on the right for pin defi nitions.
NMI Button
The non-maskable interrupt button
header is located on pins 19 and 20
of JF1. Refer to the table on the right
for pin defi nitions.
NMI Button
Pin Defi nitions (JF1)
Pin# Defi nition
19
Control
20
Ground
Power LED
Pin Defi nitions (JF1)
Pin# Defi nition
15
+5V
16
Ground
C. Front Control Panel Pin Defi nitions
A. NMI
B. PWR LED
A
B