Chapter 2: Installation
2-29
IDE Connectors
There are no jumpers to confi g-
ure the onboard IDE#1 and #2
connectors. See the table on
the right for pin defi nitions.
Pin Number
Function
1
Reset IDE
3
Host Data 7
5
Host Data 6
7
Host Data 5
9
Host Data 4
11
Host Data 3
13
Host Data 2
15
Host Data 1
17
Host Data 0
19
GND
21
DRQ3
23
I/O W rite-
25
I/O Read-
27
IOCHRDY
29
DACK3-
31
IRQ14
33
Addr 1
35
Addr 0
37
Chip Select 0
39
Activity
Pin Number
Function
2
GND
4
Host Data 8
6
Host Data 9
8
Host Data 10
10
Host Data 11
12
Host Data 12
14
Host Data 13
16
Host Data 14
18
Host Data 15
20
Key
22
GND
24
GND
26
GND
28
BALE
30
GND
32
IOCS16-
34
GND
36
Addr 2
38
Chip Select 1-
40
GND
IDE Connector Pin Definitions
IDE1
IDE2
GLAN1
®
S
UPER X6DH8-XB
GLAN2
DIMM 2A (Bank 2)
DIMM 2B (Bank 2)
DIMM 3A (Bank 3)
DIMM 3B (Bank 3)
DIMM 4A (Bank 4)
DIMM 4B (Bank 4)
DIMM 1B (Bank 1)
DIMM 1A (Bank 1)
8-pin
P W R
P W
SMB
Fan2
JAR1
IPMI
ID
E2
Flo
ppy
JCOM2
U
ltra 320
S
C
SI
CH
A
Ultra 320
SCSI CH B
F a n 4
7 9 0 2
CTRL
SATA0
SMB
PCI-X133 MHz
PCI-X 100 MHz ZCR
PCI-X 100 MHz
Battery
JPL1
RAGE-
XL
PCI-X 133 MHz
Lindenhurst
North
Bridge
VGA
COM1
USB
0 / 1
KB/
Mouse
F a n 6 F a n 5
ATX PWR
4-Pin
P W R
24-Pin
PWR1
F a n 8
SCSI
CPU 1
CPU 2
SI/O
J24
JP12
Fan1
Fan
3
IDE1
JPA1
U S B 4
VGA Ctrl
Slot1
Slot3
Slot4
Slot6
Slot7
PCI-E x4
GLAN
CTLR
ICH5R
SPKR
PXH
J BT1
J M 1
PLL
SEL
JM2
J P G 1
Slot5
Slot2
PCI-X100 MHz
PCI-X100 MHz
GLAN
CTLR
JPL2
JWO
R1
JWOL1
USB2/3
SATA1
PXH
JPA3
JPA2
BIOS
S o u t h
Bridge
J 2 7
J L 1
JP13
JOH1
JPF1
LE1
JD1
J P 1 5
JF1
F a n 7
PW3
JWD1
PWR2
E7520
J25
J K 1