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Supermicro X11DP Series, User Manual

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Chapter 2: DCPMM Memory Installation

DCPMM Population Table for the X11OP Motherboards (w/96 DIMM Slots)

Symmetric Population

2-2-1

(For Channel Configuration: 2-2-1)

Modes

CPU1

P1-

DIMMF1

P1-

DIMMF2

P1-

DIMME1

P1-

DIMME2

P1-

DIMMD1

P1-

DIMMD2

P1-

DIMMA2

P1-

DIMMA1

P1-

DIMMB2

P1-

DIMMB1

P1-

DIMMC2

P1-

DIMMC1

AD

DRAM1

-

DRAM1

DCPMM

DRAM1

DCPMM

DCPMM

DRAM1

DCPMM

DRAM1

-

DRAM1

 

MM

DRAM1

-

DRAM1

DCPMM

DRAM1

DCPMM

DCPMM

DRAM1

DCPMM

DRAM1

-

DRAM1

AD + MM

DRAM3

-

DRAM3

DCPMM

DRAM3

DCPMM

DCPMM

DRAM3

DCPMM

DRAM3

-

DRAM3

AD

DCPMM

-

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

-

DCPMM

2-2-1

CPU2

P2-

DIMMF1

P2-

DIMMF2

P2-

DIMME1

P2-

DIMME2

P2-

DIMMD1

P2-

DIMMD2

P2-

DIMMA2

P2-

DIMMA1

P2-

DIMMB2

P2-

DIMMB1

P2-

DIMMC2

P2-

DIMMC1

AD

DRAM1

-

DRAM1

DCPMM

DRAM1

DCPMM

DCPMM

DRAM1

DCPMM

DRAM1

-

DRAM1

MM

DRAM1

-

DRAM1

DCPMM

DRAM1

DCPMM

DCPMM

DRAM1

DCPMM

DRAM1

-

DRAM1

AD + MM

DRAM3

-

DRAM3

DCPMM

DRAM3

DCPMM

DCPMM

DRAM3

DCPMM

DRAM3

-

DRAM3

AD

DCPMM

-

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

-

DCPMM

2-2-1

CPU3

P3-

DIMMF1

P3-

DIMMF2

P3-

DIMME1

P3-

DIMME2

P3-

DIMMD1

P3-

DIMMD2

P3-

DIMMA2

P3-

DIMMA1

P3-

DIMMB2

P3-

DIMMB1

P3-

DIMMC2

P3-

DIMMC1

AD

DRAM1

-

DRAM1

DCPMM

DRAM1

DCPMM

DCPMM

DRAM1

DCPMM

DRAM1

-

DRAM1

 

MM

DRAM1

-

DRAM1

DCPMM

DRAM1

DCPMM

DCPMM

DRAM1

DCPMM

DRAM1

-

DRAM1

AD + MM

DRAM3

-

DRAM3

DCPMM

DRAM3

DCPMM

DCPMM

DRAM3

DCPMM

DRAM3

-

DRAM3

AD

DCPMM

-

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

-

DCPMM

2-2-1

CPU4

P4-

DIMMF1

P4-

DIMMF2

P4-

DIMME1

P4-

DIMME2

P4-

DIMMD1

P4-

DIMMD2

P4-

DIMMA2

P4-

DIMMA1

P4-

DIMMB2

P4-

DIMMB1

P4-

DIMMC2

P4-

DIMMC1

AD

DRAM1

-

DRAM1

DCPMM

DRAM1

DCPMM

DCPMM

DRAM1

DCPMM

DRAM1

-

DRAM1

 

MM

DRAM1

-

DRAM1

DCPMM

DRAM1

DCPMM

DCPMM

DRAM1

DCPMM

DRAM1

-

DRAM1

AD + MM

DRAM3

-

DRAM3

DCPMM

DRAM3

DCPMM

DCPMM

DRAM3

DCPMM

DRAM3

-

DRAM3

AD

DCPMM

-

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

-

DCPMM

2-2-1

CPU5

P5-

DIMMF1

P5-

DIMMF2

P5-

DIMME1

P5-

DIMME2

P5-

DIMMD1

P5-

DIMMD2

P5-

DIMMA2

P5-

DIMMA1

P5-

DIMMB2

P5-

DIMMB1

P5-

DIMMC2

P5-

DIMMC1

AD

DRAM1

-

DRAM1

DCPMM

DRAM1

DCPMM

DCPMM

DRAM1

DCPMM

DRAM1

-

DRAM1

 

MM

DRAM1

-

DRAM1

DCPMM

DRAM1

DCPMM

DCPMM

DRAM1

DCPMM

DRAM1

-

DRAM1

AD + MM

DRAM3

-

DRAM3

DCPMM

DRAM3

DCPMM

DCPMM

DRAM3

DCPMM

DRAM3

-

DRAM3

AD

DCPMM

-

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

-

DCPMM

2-2-1

CPU6

P6-

DIMMF1

P6-

DIMMF2

P6-

DIMME1

P6-

DIMME2

P6-

DIMMD1

P6-

DIMMD2

P6-

DIMMA2

P6-

DIMMA1

P6-

DIMMB2

P6-

DIMMB1

P6-

DIMMC2

P6-

DIMMC1

AD

DRAM1

-

DRAM1

DCPMM

DRAM1

DCPMM

DCPMM

DRAM1

DCPMM

DRAM1

-

DRAM1

MM

DRAM1

-

DRAM1

DCPMM

DRAM1

DCPMM

DCPMM

DRAM1

DCPMM

DRAM1

-

DRAM1

AD + MM

DRAM3

-

DRAM3

DCPMM

DRAM3

DCPMM

DCPMM

DRAM3

DCPMM

DRAM3

-

DRAM3

AD

DCPMM

-

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

-

DCPMM

2-2-1

CPU7

P7-

DIMMF1

P7-

DIMMF2

P7-

DIMME1

P7-

DIMME2

P7-

DIMMD1

P7-

DIMMD2

P7-

DIMMA2

P7-

DIMMA1

P7-

DIMMB2

P7-

DIMMB1

P7-

DIMMC2

P7-

DIMMC1

AD

DRAM1

-

DRAM1

DCPMM

DRAM1

DCPMM

DCPMM

DRAM1

DCPMM

DRAM1

-

DRAM1

 

MM

DRAM1

-

DRAM1

DCPMM

DRAM1

DCPMM

DCPMM

DRAM1

DCPMM

DRAM1

-

DRAM1

AD + MM

DRAM3

-

DRAM3

DCPMM

DRAM3

DCPMM

DCPMM

DRAM3

DCPMM

DRAM3

-

DRAM3

AD

DCPMM

-

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

-

DCPMM

2-2-1

CPU8

P8-

DIMMF1

P8-

DIMMF2

P8-

DIMME1

P8-

DIMME2

P8-

DIMMD1

P8-

DIMMD2

P8-

DIMMA2

P8-

DIMMA1

P8-

DIMMB2

P8-

DIMMB1

P8-

DIMMC2

P8-

DIMMC1

AD

DRAM1

-

DRAM1

DCPMM

DRAM1

DCPMM

DCPMM

DRAM1

DCPMM

DRAM1

-

DRAM1

 

MM

DRAM1

-

DRAM1

DCPMM

DRAM1

DCPMM

DCPMM

DRAM1

DCPMM

DRAM1

-

DRAM1

AD + MM

DRAM3

-

DRAM3

DCPMM

DRAM3

DCPMM

DCPMM

DRAM3

DCPMM

DRAM3

-

DRAM3

AD

DCPMM

-

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

DRAM1

-

DCPMM

2-2-1

Note

: To be continued on the next page.

Summary of Contents for X11DP Series

Page 1: ...User s Guide Revision 1 00 INTEL 1st Gen DCPMM Memory Configuration for Supermicro X11OPx X11QPx X11DPx X11SPx Motherboards...

Page 2: ...n a commercial environment This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the manufacturer s instruction manual may cause harmful...

Page 3: ...X11OPx X11QPx X11DPx X11SPx series motherboard Chapter 3 provides DCPMM configuration instructions using ipmctl and ndtcl Read this chapter when you want to configure the DCPMM settings using the open...

Page 4: ...8 5215 ML s Hertogenbosch The Netherlands Tel 31 0 73 6400390 Fax 31 0 73 6416525 Email sales supermicro nl General Information support supermicro nl Technical Support rma supermicro nl Customer Suppo...

Page 5: ...2 2 Installing DCPMM Memory Modules 11 Chapter 3 Configuring DCPMM Settings Using Open Source Utilities 3 1 DCPMM Configuration 30 3 2 Ipmctl Configuration 32 Chapter 4 Configuring DCPMM Settings Usin...

Page 6: ...able cost DCPMM memory supports three modes Memory Mode App Direct Mode and Mixed Mode Optimized for volatile use Memory Mode provides a high capacity main memory solution with higher power efficiency...

Page 7: ...gurated in Mixed Memory Mode with a portion of their capacity used for Memory Mode operations and the remaining capacity as persistent memory for App Direct Mode operations All DDR4 DIMMs discovered i...

Page 8: ...C Using this enhanced feature will spare the faulty DRAM device out after an SDDC event has occurred After the event ECC mode will be activated to further protect the system against any additional mem...

Page 9: ...sor ESXi 6 7 U1 Ubuntu LTS 18 04 Processor Platform Support 1st Gen DCPMM modules are supported by the following processors 2nd Gen Intel Xeon Scalable SP 82xx 62xx 52xx 4215 series processors Platfor...

Page 10: ...ndle the motherboard by its edges only do not touch its components peripheral chips memory modules or gold contacts When handling chips or modules avoid touching their pins Put the motherboard and per...

Page 11: ...ame type as well 4 When installing a memory module be sure to install the DIMM module in the first channel slot i e DIMMA1 and then in the second channel slot i e DIMMA2 5 Please use balanced configur...

Page 12: ...per processor Processors with an M suffix i e 8280M 2 TB maximum per processor Processors with no suffix i e 8280 1 TB per processor Restrictions on Memory Configuration Settings When configuring memo...

Page 13: ...dual population rearrangements between channels are allowed as long as the resulting population is compliant with the Supermicro X11OPx X11QPx X11DPx X11SPx memory population rules for the 2nd Gen Int...

Page 14: ...elow DRAM2 RDIMM DRAM3 RDIMM 3DS RDIMM LRDIMM Note DDR4 single rank x8 is not available for DCPMM Memory Mode or App Direct Mode Legend for the first two tables above Capacity DCPMM Any Capacity Unifo...

Page 15: ...ratio is between 1 4 and 1 16 Excessive capacity for DCPMM can be used for AD For each individual population rearrangements between channels are allowed as long as the resulting population is complian...

Page 16: ...ratio is between 1 4 and 1 16 Excessive capacity for DCPMM can be used for AD For each individual population rearrangements between channels are allowed as long as the resulting population is complia...

Page 17: ...Capacity DCPMM Any Capacity Uniformly for all channels for a given configuration 2nd socket has no DCPMM DIMM Mode definitions AD App Direct Mode MM Memory Mode AD MM Mixed Mode For MM general DDR4 D...

Page 18: ...2 1 1 1 Legend for the two tables above DDR4 Type Capacity DRAM1 RDIMM 3DS RDIMM LRDIMM 3DS LRDIMM Refer to Validation Matrix DDR4 DIMMs validated with DCPMM below DRAM2 RDIMM DRAM3 RDIMM 3DS RDIMM LR...

Page 19: ...DCPMM DRAM1 MM DRAM1 DCPMM DRAM1 DCPMM DRAM1 DCPMM DCPMM DRAM1 DCPMM DRAM1 DCPMM DRAM1 AD MM DRAM3 DCPMM DRAM3 DCPMM DRAM3 DCPMM DCPMM DRAM3 DCPMM DRAM3 DCPMM DRAM3 CPU3 P3 DIMMF1 P3 DIMMF2 P3 DIMME1...

Page 20: ...1 DIMMD2 P1 DIMMA2 P1 DIMMA1 P1 DIMMB2 P1 DIMMB1 P1 DIMMC2 P1 DIMMC1 AD DRAM1 DRAM1 DCPMM DRAM1 DCPMM DCPMM DRAM1 DCPMM DRAM1 DRAM1 MM DRAM1 DRAM1 DCPMM DRAM1 DCPMM DCPMM DRAM1 DCPMM DRAM1 DRAM1 AD MM...

Page 21: ...M1 DRAM1 DRAM1 DRAM1 DCPMM AD MM DCPMM DRAM3 DRAM3 DRAM3 DRAM3 DCPMM Asymmetric Population 2 1 1 1 For Channel Configuration 2 1 1 1 Modes CPU1 P1 DIMMF1 P1 DIMMF2 P1 DIMME1 P1 DIMME2 P1 DIMMD1 P1 DIM...

Page 22: ...ed Mode For MM general DDR4 DCPMM ratio is between 1 4 and 1 16 Excessive capacity for DCPMM can be used for AD For each individual population rearrangements between channels are allowed as long as th...

Page 23: ...1 DCPMM DRAM1 MM DRAM1 DCPMM DRAM1 DCPMM DRAM1 DCPMM DCPMM DRAM1 DCPMM DRAM1 DCPMM DRAM1 AD MM DRAM3 DCPMM DRAM3 DCPMM DRAM3 DCPMM DCPMM DRAM3 DCPMM DRAM3 DCPMM DRAM3 CPU5 P5 DIMMF1 P5 DIMMF2 P5 DIMME...

Page 24: ...2 P4 DIMMB1 P4 DIMMC2 P4 DIMMC1 AD DRAM1 DRAM1 DRAM1 DCPMM DCPMM DRAM1 DRAM1 DRAM1 MM DRAM2 DRAM2 DRAM2 DCPMM DCPMM DRAM2 DRAM2 DRAM2 AD MM DRAM3 DRAM3 DRAM3 DCPMM DCPMM DRAM3 DRAM3 DRAM3 CPU5 P5 DIMM...

Page 25: ...DCPMM DRAM1 DCPMM DRAM1 DRAM1 AD MM DRAM3 DRAM3 DCPMM DRAM3 DCPMM DCPMM DRAM3 DCPMM DRAM3 DRAM3 AD DCPMM DRAM1 DRAM1 DRAM1 DRAM1 DRAM1 DRAM1 DRAM1 DRAM1 DCPMM 2 2 1 CPU5 P5 DIMMF1 P5 DIMMF2 P5 DIMME1...

Page 26: ...DIMMD2 P4 DIMMA2 P4 DIMMA1 P4 DIMMB2 P4 DIMMB1 P4 DIMMC2 P4 DIMMC1 AD DCPMM DRAM1 DRAM1 DRAM1 DRAM1 DCPMM MM DCPMM DRAM1 DRAM1 DRAM1 DRAM1 DCPMM AD MM DCPMM DRAM3 DRAM3 DRAM3 DRAM3 DCPMM CPU5 P5 DIMMF...

Page 27: ...P4 DIMME2 P4 DIMMD1 P4 DIMMD2 P4 DIMMA2 P4 DIMMA1 P4 DIMMB2 P4 DIMMB1 P4 DIMMC2 P4 DIMMC1 AD DRAM1 DRAM1 DRAM1 DCPMM DRAM1 DRAM1 DRAM1 CPU5 P5 DIMMF1 P5 DIMMF2 P5 DIMME1 P5 DIMME2 P5 DIMMD1 P5 DIMMD2...

Page 28: ...ngements between channels are allowed as long as the resulting population is compliant with the Supermicro X11OPx X11QPx X11DPx X11SPx memory population rules for the 2nd Gen Intel Xeon Scalable SP 82...

Page 29: ...memory slot Release Tabs Notches DIMM Removal Press both release tabs on the ends of the DIMM module to unlock it Once the DIMM module is loosened remove it from the memory slot Warning Please do not...

Page 30: ...is available for download from GitHub It supports the following features Discovery Configuration Firmware management Security functionality management Health monitoring Performance tracking Debug and...

Page 31: ...multaneously support PMEM and BLK mode access Namespace Namespace defines a contiguously addressed range of non volatile memory which is similar in concept to a hard disk partition SCSI Logical Unit L...

Page 32: ...ration The full list of commands can be seen by running ipmctl help from the command line Show Topology Use the ipmctl sudo show topology command to display the DCPMMs and DDR DIMMs discovered in the...

Page 33: ...splays DIMM IDs capacities health state and firmware version Show Provisioned Capacity Use the ipmctl show memoryresources command to display the provisioned capacity under different DCPMM mode config...

Page 34: ...is goal will be applied after the system has been reset Memory Mode Configuration Use the ipmctl create goal MemoryMode n command to provision any percentage of DCPMM capacity on all sockets where n r...

Page 35: ...in traditional storage DCPMM interleaving increases the throughput of reads and writes to persistent memory Use the ipmctl create goal PersistentMemoryType AppDirect or the default ipmctl create goal...

Page 36: ...to Memory Mode and the remaining capacity to App Direct Mode as an interleaved region When part or all of the capacity is set to Memory Mode the DDR4 DRAM capacity is hidden from the applications and...

Page 37: ...e current configuration to a file Show Current Goal Use the ipmctl show goal command to display the goal that is currently in place Delete Goal A goal will not be executed until after a system reboot...

Page 38: ...ange Use the ipmctl show memoryresources command to confirm if the mode has been changed successfully after a system reboot If the mode is changed from Memory Mode to App Direct Mode a single region p...

Page 39: ...39 Chapter 3 Configuring DCPMM Settings Using Open Source Utilities K 1 Confirm Mode Change CentOS L 1 Display Region CentOS K 2 Confirm Mode Change Windows L 2 Display Region Windows...

Page 40: ...he namespace of the user s choice X represents the namespace on the active namespaces list Note It is imperative to stop applications and unmount used namespaces before disabling the namespace Create...

Page 41: ...sents the namespace on the active namespaces list List Active Regions Use ndctl list R to display the active regions list Delete Region Use the ndctl disable region X command to delete the region of t...

Page 42: ...IOS setup utility please follow the instructions below Press the del key continuously during system boot to enter the BIOS setup utility After the system enters the BIOS setup utility use the arrow ke...

Page 43: ...ettings Using BIOS Use the down arrow key to select Region and hit Enter The following screen will display Scroll down to select Create goal config in the screen as shown below A 2 DCPMM Configuration...

Page 44: ...uide When the screen above displays select Create goal config and press Enter The screen on the top of the next page will display which allow you to configure DCPMM memory as App Direct Mode Memory Mo...

Page 45: ...ory as App Direct Mode Select Platform as the default setting for the the item Create goal config for This will set all DCPMM memory modules to App Direct Mode Set the values of Reserved and Memory Mo...

Page 46: ...Gen DCPMM Memory for X11OPx X11QPx X11DPx X11SPx Motherboards Guide Note If you have properly configured the DCPMM settings your BIOS screen will display as shown on the next page B 2 Create Goal Conf...

Page 47: ...reate a namespace please follow the steps below Follow the instructions given in Section 1 to enter the BIOS utility Select Advanced on the top of the menu bar and press Enter The following screen wil...

Page 48: ...s scroll down to Namespaces to select it and press Enter the following screen will display for you to create a namespace Select Create Namespaces and press Enter to create a namespace for the region T...

Page 49: ...DCPMM Settings Using BIOS Select Name and press Enter Enter a name in the popup window Select Create Namespace and press Enter to create a namespace for a region as shown below B 6 Create a Namespace...

Page 50: ...X11QPx X11DPx X11SPx Motherboards Guide Be sure to confirm that the namespace was successfully created If the namespace was properly created the health status of the memory region will be displayed as...

Page 51: ...on 1 to enter the BIOS utility Select Advanced to enter the Advanced menu Select Intel R Optane DC Persistent Memory and press Enter Select Region to configure Region settings and create Region IDs Se...

Page 52: ...g and press Enter the following screen will display To configure DCPMM as Memory Mode select Memory Mode and enter 100 as the default Save the setting and reboot the system for the changes you ve made...

Page 53: ...es 36 37 After you ve set DCPMM memory to Memory Mode as shown on the previous page change the Memory Mode to a value between 1 to 99 as shown the screen below The rest of the memory allocation will b...

Page 54: ...Memory for X11OPx X11QPx X11DPx X11SPx Motherboards Guide After the system reboots enter the BIOS utility to confirm that a Mixed Memory region was successfully created as shown in the screen below D...

Page 55: ...ons given in the section To Create a Namespace for a Region pages 32 35 to create a name space for a Mixed Memory After you ve created a namespace for a Mixed Memory region confirm that the namespace...

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