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Chapter 2: Installation
Speaker Header (Optional for an External Speaker/Buzzer)
A speaker header, located at JD1, can be used in conjunction with an external speaker
(optional). Use an appropriate cable to connect this header to an external speaker or buzzer
for support of BIOS beep codes and system alarms. See the layout below for JD1 location.
Speaker Connector
Pin Definitions
Pin Setting
Definition
Pins 1-3
Power LED
Pins 4-7
Speaker
JBMC_DEBUG
SRW1
JM2_1
JUIDB1
JP3
FAN5
FAN6
FAN4 FAN3
FAN2 FAN1
JBT1
LE3
LE1
C
A
LEDM1
LE2
JNVI2C1
JIPMB1
JNVI2C2
JPME2
JPME1
T-SGPIO3
BT1
+
JSTBY1
JD1
1
JL1
JP2
JF1
JPWR1
JPWR2
JPI2C1
JPWR3
JTPM1
VROC (JRK1)
JSXB1_2
JAOM
JSXB1_1
JSXB1_3
BAR CODE
X11DDW-L
REV:1.02
MAC CODE
DESIGNED IN USA
BIOS LICENSE
I-SATA 4~7
I-SATA 0~3
S-SATA 0~3
P1_NVME1
P1_NVME0
P2_NVME1
P2_NVME0
CPU2_POR
T2A
CPU2_POR
T2B
CPU2_POR
T2C
CPU2_POR
T2D
CPU1_POR
T3C
CPU1_POR
T3D
CPU1_POR
T3C
CPU1_POR
T3D
CPU1_POR
T3B
CPU1_POR
T3A
CPU1_POR
T3B
CPU1_POR
T3A
SXB1B:CPU1 PCI-E 3.0 X16 + CPU2 PCI-E 3.0 X16
CPU2_POR
T3
SXB2:CPU2 PCI-E 3.0 X16
USB4/5(3.0)
USB0/1(3.0)
USB2/3
(3.0)
S-SA
TA5
S-SA
TA4
VGA
LAN1
LAN2
X NMI
PWR
LED
NIC HDD
LED
NIC
2
1
UID
LED
PS
FAIL
PWRRST
ON
IPMI_LAN
JWD1 JBR1
C621
10G PHY
BMC
CPU1
CPU2
P2 DIMM D1
P2 DIMM E1
P2 DIMM F1
P2 DIMM C1
P2 DIMM B1
P2
DIMM A1
P1 DIMM F1 P1 DIMM E1 P1 DIMM D1
P1
DIMM A1
P1 DIMM B1
P1 DIMM C1
JPL1
1
1. Speaker Header
