51
Chapter 2: Installation
SAN MAC
DESIGNED IN USA
BIOS
LICENSE
X1
1SPi-TF
REV
:1.02
IPMI CODE
MAC CODE
BAR CODE
JTPM1
JPWR1
MH11
MH10
JRK1
BT1
SP1
+
LEDBMC
LE3
LEDPWR
C
JL1
JOH1
JBT1
JSTBY1
JSD1
JSD2
JVRM1
JWD1
JPG1
JPME2
JIPMB1
JNVI2C1
FAN4 FAN3 FAN2
FAN1
FANA
FANB
FAN5
JPI2C1
JD1
I-SGPIO2
S-SGPIO1
I-SGPIO1
I-SATA4
I-SATA5
I-SATA6
I-SATA7
I-SATA0
S-SATA0
S-SATA1
I-SATA1
I-SATA2
I-SATA3
JF1
JPWR2
M.2 PCI-E 3.0 X4
USB10(3.0)
USB8/9(3.0)
USB6/7(3.0)
USB4/5
USB2/3
COM1
COM2
USB0/1
IPMI_LAN
LAN1
LAN2
VGA
UID-SW
UID-LED
PCH SLOT1 PCI-E 3.0 X4(IN X8)
CPU SLOT2 PCI-E 3.0 X8
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT4 PCI-E 3.0 X16
CPU SLOT6 PCI-E 3.0 X16
CPU
DIMMF1
DIMME1
DIMMD1
DIMMD2
DIMM
A2
DIMM
A1
DIMMB1
RST
JF1
ON PWR
UID
LED
PS
FAIL
1
NIC
2
NIC
NMI
X
PWR
HDD
LED
LED
Intel
C622
ASpeed
AST2500
JPTG1
Intel
X557
DIMMC1
Power SMB (I
2
C) Header
The Power System Management Bus (I
2
C) connector (JPI
2
C1) monitors the power supply,
fan, and system temperatures. Refer to the table below for pin definitions.
Power SMB Header
Pin Definitions
Pin#
Definition
1
Clock
2
Data
3
PMBUS_Alert
4
Ground
5
+3.3V
4-pin BMC External I
2
C Header
A System Management Bus header for IPMI 2.0 is located at JIPMB1. Connect the appropriate
cable here to use the IPMB I
2
C connection on your system. Refer to the table below for pin
definitions.
External I
2
C Header
Pin Definitions
Pin#
Definition
1
Data
2
Ground
3
Clock
4
No Connection
1
2
1. Power SMB Header
2. BMC External Header
