Supermicro H8DMT, User Manual

Page: 55 / 62

B-1
Appendix B
BIOS POST Checkpoint Codes
B-1 Uncompressed Initialization Codes
The uncompressed initialization checkpoint codes are listed in order of execution:
B-2 Bootblock Recovery Codes
The bootblock recovery checkpoint codes are listed in order of execution:
Checkpoint Code Description
D0h
The NMI is disabled. Power on delay is starting. Next, the initialization code
checksum will be verified.
D1h
Initializing the DMA controller, performing the keyboard controller BAT test,
starting memory refresh and entering 4 GB flat mode next.
D3h Starting memory sizing next.
D4h Returning to real mode. Executing any OEM patches and setting the Stack next.
D5h
Passing control to the uncompressed code in shadow RAM at E000:0000h. The
initialization code is copied to segment 0 and control will be transferred to
segment 0.
Checkpoint Code Description
E0h
The onboard floppy controller if available is initialized. Next, beginning the base
512 KB memory test.
E1h Initializing the interrupt vector table next.
E2h Initializing the DMA and Interrupt controllers next.
E6h
Enabling the floppy drive controller and Timer IRQs. Enabling internal cache
memory.
Edh Initializing the floppy drive.
Efh A read error occurred while reading the floppy drive in drive A:.
F0h Next, searching for the AMIBOOT.ROM file in the root directory.
F1h The AMIBOOT.ROM file is not in the root directory.
F2h
Next, reading and analyzing the floppy diskette FAT to find the clusters occupied
by the AMIBOOT.ROM file.
F3h Next, reading the AMIBOOT.ROM file, cluster by cluster.
F4h The AMIBOOT.ROM file is not the correct size.
F5h Next, disabling internal cache memory.
FBh Next, detecting the type of flash ROM.