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38
H11SSL Motherboard Series User's Manual
2.6 Front Control Panel
JF1 contains header pins for various buttons and indicators that are normally located on a
control panel at the front of the chassis. These connectors are designed specifically for use
with Supermicro chassis. See the figure below for the location of JF1..
JUIDB2
JPW1
SAS CODE
MAC CODE
IPMI CODE
BIOS LICENSE
DESIGNED IN USA
H11SS
L-i
BAR CODE
JI2C_FP1
JNCSI1
JPI
2C1
SP1
JLAN1
JLAN2
LEDSAS
A
C
JUSB3
1
19
10
11
JT
PM1
JSD2
1
JSD1
1
3
JVRM1
JPL2
JPG1
JPB1
3
JWD1
JBR2
JPL1
JPSAS1
JPS1
JCOM1
JF1
1
FAN5
FAN4
FAN3
FAN2
FAN1
FANA
1
JOH1
BT2
+
TP3
JVGA1
LED1
LE1
A
LEDM1
LE3
JBT1
JSD
CARD1
JI2C_EXP1
JSEN1
MH16
MH15
JPWR2
1
JPWR1
JPCIE5
JPCIE1
J23
JPCIE6
JPCIE4
I-SATA6
7
I-S
ATA7
I-SATA5
I-S
ATA4
I-SATA3
I-SATA2
I-S
ATA1
1
I-S
ATA0
M
H7
MH6
MH2
JNVME1
PRESS FIT
JNVME0
PRESS FIT
JSAS1
PRESS FIT
DS1
CPU
1-2:Enable SAS HDD
Sta
tus Suppo
rt(
Default)
2-3:Disable SAS HDD
Sta
tus Suppo
rt
JPSAS1
SATA12~15
SATA8~11
SA
TA DOM + POWER
SA
TA DOM + POWER
JF1
UID-LED
JVRM1
2-3 DISABLE
1-2 ENABLE
OH
RST
PWR
ON
FAI
L PS
NI
C
LED UID
2
NI
C
1
LED PWR
LED HDD
NMI
X
L-SAS0-7
BA
TTE
RY
JBT1:CMOS CLEAR
TP
M/PO
RT80
PWRI2C
JL1:CHASSIS INTRUSION
SATA DOM POWER
SATA DOM POWER
SPEAKER-PIN 4-7 PWR L
ED
-PIN 1-3
JD1:
2-3:BIOS RE
COVE
RY
1-2:NOR
M
AL
JBR1
JWD1:
W
AT
CH DOG
2-3:NMI 1-2:RST
1-2:Enable LSI SAS3008(Default)
2-3:Disable LSI SAS3008
JPS1
CPU S
LO
T1 PCI-E 3.0 X8
CPU S
LO
T2 PCI-E 3.0 X16
CPU S
LO
T3 PCI-E 3.0 X8
CPU S
LO
T4 PCI-E 3.0 X16
CPU S
LO
T5 PCI-E 3.0 X8
CPU S
LO
T6 PCI-E 3.0 X16
JPL2:LAN2
2-3 DISABLE
1-2 ENABLE
JPL1:LAN1
2-3 DISABLE
1-2 ENABLE
UID-SW
VGA
LAN2
LAN1
(3.0)
USB 4/5
IPMI_LAN
USB 0/1
JPB1:BMC
2-3 DISABLE
1-2 ENABLE
1-2 ENABLE JPG1:VGA
2-3 DISABLE
SD_
CARD
COM1
P1-DIMMD1 P1-DIMMC1 P1-DIMMB1 P1-DIM
M
A1
P1-DIMME1 P1-DIMMF1 P1-DIMMG1 P1-DIMMH1
CPU
USB6/7(3.0)
1
7
J25
USB2/3
JUSBA1
USB8(3.
0)
JSTBY1
Power Button
UID LED
1
NIC1 Link LED
Reset Button
2
HDD LED
PWR LED
Reset
PWR
3.3V
3.3V Stby
3.3V Stby
Ground
Ground
19
20
X
NMI
X
3.3V Stby
3.3 V
3.3V Stby
Power Fail LED
NIC2 Link LED
X
Figure 2-2. JF1 Pin Definitions