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Super B2SD2(1)-8C/12C/16C-TF MicroBlade Module User's Manual
IPMI CODE
IPMI CODE
+
MAC CODE
MAC CODE
BAR CODE
DESIGNED IN USA
RE
V:1.00
P2-SATA2
P1-SATA2
J2
J3
P1-BT1
P2-BT1
P1_JBT1
P2_JBT1
P1-JSD1
P2-JSD1
LEDM1
LEDM2
P2-JPT1
P1-JWD1
P2-JWD1
P1-JPME2
P1-JPT1
P1-JVRM1
P2-JVRM1
P2-JPME2
P2-JTPM1
P1-JTPM1
J27
AST
2500
AST
2500
J3
P1 M.2-P PCI-E 3.0X4
P2 M.2-P PCI-E 3.0X4
SATA DOM POWER
SUPERDOM
SATA DOM POWER
SUPERDOM
P2-DIMMD1 P2-DIMME1
P2-DIMMA1
1-2:NORMAL
2-3:ME MANUFACTURING MODE
CPU2
P2-JPME2
CPU1
P1-DIMME1
P1-DIMMD1
P1-DIMMA1
P1-DIMMB1
2-3:DISABLE
1-2:ENABLE
P2-JPT1:TPM
P1-
JP
ME2
1-2:NORM
AL
2-3:ME M
ANUF
AC
TURING MODE
CMOS CLEAR
P1-JWD1
2-3:NMI
1-2:RST
WATCH DOG
P1-JPT1:TPM
2-3:DISABLE
2-3:DISABLE
1-2:ENABLE
1-2:ENABLE
P2-JWD1
2-3:NMI
1-2:RST
WATCH DOG
TPM/PORT80
TPM/PORT80
P1-LEDBMC
P2-LEDBMC
P2-DIMMB1
B2SD2-8C-TF
1. TPM Header for Node 1
2. TPM Header for Node 2
1
2
TPM/Port 80 Header
The P1-JTPM1 and P2-JTPM1 headers are used to connect a Trusted Platform Module
(TPM) and a Port 80 connection. Use this header to enhance system performance and data
security. Refer to the table below for pin definitions.
Trusted Platform Module Header
Pin Definitions
Pin#
Definition
Pin#
Definition
1
+3.3V
2
SPI_CS#
3
RESET#
4
SPI_MISO
5
SPI_CLK
6
GND
7
SPI_MOSI
8
9
+3.3V Stby
10
SPI_IRQ#
