Super X9SCA, User Manual

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X9SCi-LN4/X9SCi-LN4F/X9SCA/X9SCA-F
Adjacent Cache Line Prefetch (Available when supported by the CPU)
The CPU fetches the cache line for 64 bytes if this option is set to Disabled. The
CPU fetches both cache lines for 128 bytes as comprised if
Enabled .
Intel® Virtualization Technology (Available when supported by the CPU)
Select Enabled to use the feature of Virtualization Technology to allow one platform
to run multiple operating systems and applications in independent partitions, creat-
ing multiple "virtual" systems in one physical computer. The options are
Enabled
and Disabled. Note : If there is any change to this setting, you will need to power
off and restart the system for the change to take effect. Please refer to Intel’s web
site for detailed information.
Execute-Disable Bit Capability (Available when supported by the OS and
the CPU)
Set to Enabled to enable the Execute Disable Bit which will allow the processor
to designate areas in the system memory where an application code can execute
and where it cannot, thus preventing a worm or a virus from flooding illegal codes
to overwhelm the processor or damage the system during an attack. The default is
Enabled . (Refer to Intel and Microsoft Web Sites for more information.)
Intel® Hyper Threading Technology
Set to Enabled to use the processor's Hyper Threading Technology feature. The
options are
Enabled and Disabled.
Active Processor Cores
Set to Enabled to use a processor's Second Core and beyond. (Please refer to
Intel's web site for more information.) The options are
All, 1, 2 and 3.
Power Technology
This feature determines what power-saving scheme the motherboard uses. The
options are Disabled,
Energy Efficient and Custom. If Custom is selected, the
following options become available:
EIST
EIST (Enhanced Intel SpeedStep Technology) allows the system to automati-
cally adjust processor voltage and core frequency in an effort to reduce
power consumption and heat dissipation.
Please refer to Intel’s web site
for detailed information. The options are Disabled and Enabled.
P-STATE Coordination
This feature selects the type of coordination for the P-State of the processor.
P-State is a processor operational state that reduces the processor's voltage