Real-time clock (RTC)
RM0090
802/1731
DocID018909 Rev 11
same moment, the application must not write ‘0’ into TSF bit unless it has already read it to
‘1’.
Optionally, a tamper event can cause a timestamp to be recorded. See the description of the
TAMPTS control bit in
Section 26.6.17: RTC tamper and alternate function configuration
. If the timestamp event is on the same pin as a tamper event
configured in filtered mode (TAMPFLT set to a non-zero value), the timestamp on tamper
detection event mode must be selected by setting TAMPTS='1' in RTC_TAFCR register.
TIMESTAMP alternate function
The TIMESTAMP alternate function (RTC_TS) can be mapped either to RTC_AF1 or to
RTC_AF2 depending on the value of the TSINSEL bit in the RTC_TAFCR register (see
Section 26.6.17: RTC tamper and alternate function configuration register (RTC_TAFCR)
Mapping the timestamp event on RTC_AF2 is not allowed if RTC_AF1 is used as TAMPER
in filtered mode (TAMPFLT set to a non-zero value).
26.3.13 Tamper
detection
Two tamper detection inputs are available. They can be configured either for edge detection,
or for level detection with filtering.
RTC backup registers
The backup registers (RTC_BKPxR) are twenty 32-bit registers
for storing 80 bytes of user
application data. They are implemented in the backup domain that remains powered-on by
V
BAT
when the V
DD
power is switched off. They are not reset by system reset or when the
device wakes up from Standby mode. They are reset by a backup domain reset
The backup registers are reset when a tamper detection event occurs (see
RTC backup registers (RTC_BKPxR)
and
Tamper detection initialization on page 802
Tamper detection initialization
Each tamper detection input is associated with the TAMP1F/TAMP2F flags in the RTC_ISR2
register. Each input can be enabled by setting the corresponding TAMP1E/TAMP2E bits to 1
in the RTC_TAFCR register.
A tamper detection event resets all backup registers (RTC_BKPxR).
By setting the TAMPIE bit in the RTC_TAFCR register, an interrupt is generated when a
tamper detection event occurs.
Timestamp on tamper event
With TAMPTS set to ‘1 , any tamper event causes a timestamp to occur. In this case, either
the TSF bit or the TSOVF bit are set in RTC_ISR, in the same manner as if a normal
timestamp event occurs. The affected tamper flag register (TAMP1F, TAMP2F) is set at the
same time that TSF or TSOVF is set.
Edge detection on tamper inputs
If the TAMPFLT bits are “00”, the TAMPER pins generate tamper detection events
(RTC_TAMP[2:1]) when either a rising edge is observed or an falling edge is observed
depending on the corresponding TAMPxTRG bit. The internal pull-up resistors on the
TAMPER inputs are deactivated when edge detection is selected.
