DocID018909 Rev 11
RM0090
Flexible static memory controller (FSMC)
1588
36.6.9 FSMC
register
map
The following table summarizes the FSMC registers.
Table 248. FSMC register map
Offset
Register
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0000
FSMC_BCR1
Reserved
CBURSTR
W
CPS
IZE
[2:0]
ASY
N
C
W
A
IT
EXTMOD
WA
IT
E
N
WR
EN
WA
IT
C
F
G
WRAP
MOD
WA
IT
P
O
L
BURSTEN
Reserved
F
A
CCEN
M
W
ID
[1
:0
]
M
T
YP
[0
:1
]
MUXEN
MBKE
N
0008
FSMC_BCR2
Reserved
CBURSTR
W
CPS
IZE
[2:0]
ASY
N
C
W
A
IT
EXTMO
D
WA
IT
E
N
WR
EN
WA
IT
C
F
G
WRAP
MOD
WA
IT
P
O
L
BURSTEN
Reserved
F
A
CCEN
M
W
ID
[1
:0
]
M
T
YP
[0
:1
]
MUXEN
MBKE
N
0010
FSMC_BCR3
Reserved
CBURSTR
W
CP
SIZE
[2:0]
ASY
NC
W
A
IT
EXTMO
D
WA
IT
E
N
WR
E
N
WA
IT
C
F
G
WRAP
MOD
WA
IT
P
O
L
BURSTEN
Reserved
F
A
CCEN
M
W
ID
[1
:0
]
MTYP[
0:
1]
MUXEN
MBKE
N
0018
FSMC_BCR4
Reserved
CBURSTR
W
CP
SIZE
[2:0]
ASY
NC
W
A
IT
EXTMO
D
WA
IT
E
N
WR
E
N
WA
IT
C
F
G
WRAP
MOD
WA
IT
P
O
L
BURSTEN
Reserved
F
A
CCE
N
M
W
ID
[1
:0
]
MTYP[
0:
1]
MUXEN
MBKE
N
0004
FSMC_BTR1
Res.
A
CCM
O
D
[1
:0
]
DA
T
LA
T
[3
:0
]
CL
KDIV
[3:0]
B
U
STURN[3:0]
DA
TA
ST[7
:0
]
A
DDH
LD
[3:0]
ADDSET[3:0]
000C
FSMC_BTR2
Res.
A
CCM
O
D
[1
:0
]
DA
T
LA
T
[3
:0
]
CL
KDIV
[3
:0]
BUSTURN[3:0]
DA
TA
ST[7:0
]
A
DDH
LD
[3:0]
ADDSET[3:0]
0014
FSMC_BTR3
Res.
A
CCM
O
D
[1
:0
]
DA
T
LA
T
[3
:0
]
CL
KDIV
[3
:0]
BUSTURN[3:0]
DA
TA
ST[7:0
]
A
DDHLD[3
:0]
ADDSET[3:0]
001C
FSMC_BTR4
Res.
A
CCM
O
D
[1
:0
]
DA
T
LA
T
[3
:0
]
CL
KDIV
[3
:0]
BUSTURN[3:0]
DA
TAST[
7
:0
]
ADDHLD[3
:0]
ADDSET[3:0]
0104
FSMC_BWTR
1
Res.
ACC
MOD
[1:0]
Res.
BUSTURN[3
:0]
DA
TAST[
7
:0
]
ADDHLD[3
:0]
AD
D
S
E
T
[3
:0
]
010C
FSMC_BWTR
2
Res.
ACC
MOD
[1:0]
Res.
BUSTURN[3
:0]
DA
TA
S
T
[7
:0
]
ADDHLD[3
:0]
A
DDSET[
3
:0
]