Introduction
STCF03
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7 Introduction
The STCF03 is a buck-boost converter, dedicated to power and control the current of a
Power White LED in a camera cell phone. The device operates at a constant switching
frequency of 1.8 MHz typ. It provides an output voltage down to 2.5 V and up to 5.3 V, from
a 2.7 V to 5.5 V supply voltage. This supply range allows operation from a single cell
Lithium-Ion battery. The I
2
C bus is used to control the device operation and for diagnostic
purposes. The current in Torch mode is adjustable from 15 mA to 200 mA. Flash mode
current is adjustable up to 800 mA, BGA version is able to deliver 600 mA at battery range
2.7 V to 3.3 V. The Aux LED current can be adjusted from 0 to 20 mA. The device uses an
external NTC resistor to sense the temperature of the white LED. These two last functions
may not be needed in all applications, and in these cases the relevant external components
can be omitted.
7.1 Buck-Boost
converter
The regulation of the PWM controller is done by sensing the current of the LED through
external sensing resistors (R
FL
and R
TR
, see application schematic). Depending on the
forward voltage of the Flash LED, the device automatically can change the operation mode
between buck (step down) and boost (step up) mode.
Three cases can occur: Boost region (V
O
> V
BAT
): this configuration is used in most of the
cases, as the output voltage V
O
= V
fLED
+ I
LED
x RFL) is higher than V
BAT
; Buck region (V
O
< V
BAT
); Buck / Boost region (V
O
~ V
BAT
).
7.2
Logic pin description
7.2.1 SCL,
SDA
pins
These are the standard Clock and Data pins as defined in the I
2
C bus specification. External
pull-up is required according to I
2
C bus specifications. The recommended maximum voltage
of these signals should be 3.0 V.
7.2.2 TRIG
pin
This input pin is internally AND-ed with the TRIG_EN bit to generate the internal signal that
activates the flash operation. This gives to the user the possibility to accurately control the
flash duration using a dedicated pin, avoiding the I
2
C bus latencies (hard-triggering). No
internal pull-up nor pull-down is provided.
7.2.3 ATN
pin
This output pin (open-drain, active LOW) is provided to better manage the information
transfer from the STCF03 to the µP. Because of the limitations of a Single Master I
2
C bus
configuration, the µP should regularly poll the STCF03 to verify if certain operations have
been completed, or to check diagnostic information. Alternatively, the µP can use the ATN
pin to be advised that new data are available in the STAT_REG, thus avoiding continuous
polling. Then the information can be read in the STAT_REG by a read operation via I
2
C that,
besides, automatically resets the ATN pin. The STAT_REG bits affecting the ATN pin status
are mapped in
. No internal pull-up is provided.
