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AN3248

Doc ID 17758 Rev 1

19/19

         

 

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Summary of Contents for AN3248

Page 1: ...ent resistor LDR The six application cases demonstrate the usefulness of analog comparators and show how they are integrated with other peripherals for example the digital to analog converter DAC and...

Page 2: ...Introduction 1 1 Analog voltage monitoring 5 2 Analog watchdog during Stop mode 8 3 Pulse width measurement 10 4 PWM signal control 12 5 Capacitance measurement 13 6 Brightness control using a light...

Page 3: ...AN3248 List of tables Doc ID 17758 Rev 1 3 19 List of tables Table 1 Document revision history 18...

Page 4: ...ned in window mode 8 Figure 6 Analog watchdog during stop mode 9 Figure 7 COMP2 with output redirection feature 10 Figure 8 Pulse width measurement COMP2 output redirection to timer 11 Figure 9 PWM si...

Page 5: ...op mode and can be disabled by configuration Once VREFINT is disabled the comparators can no longer be used In an analog voltage monitoring application where the sensor output voltage is lower than th...

Page 6: ...utput connection to COMP1 1 Legend for Figure 2 COMP1_INP ADC CHx comparator 1 non inverting input shared with ADC channel x 2 Only if required Figure 3 shows the gain in power consumption in an analo...

Page 7: ...nd non inverting inputs Figure 4 COMP2 configuration 1 Legend for Figure 4 DAC_OUT1 DAC channel 1 output DAC_OUT2 DAC channel 2 output VREFINT Internal reference voltage CMP2OUT Comparator 2 output in...

Page 8: ...U is stopped Consequently lower consumption is achieved and power is saved Figure 5 displays the configuration of two such analog comparators in window mode Threshold1 is set to the internal reference...

Page 9: ...witching to Run mode Figure 6 gives an overview of an analog watchdog application with threshold1 higher than threshold2 Figure 6 Analog watchdog during stop mode 1 While the MCU is in Stop mode the i...

Page 10: ...ve the timer counter at both rising and falling edges When the input signal goes above the reference voltage COMP2 output is at a high level generating a rising edge on the timer input capture When th...

Page 11: ...timers Note Signal frequency can be achieved by configuring the timer input capture channel to save the counter value on only a rising or falling edge Note DAC outputs DAC_OUT1 or DAC_OUT2 can be used...

Page 12: ...on inverting input In this situation the reference voltage is connected to the COMP2 inverting input When the current sensor output exceeds the selected threshold the COMP2 output goes high and the PW...

Page 13: ...sists of charging and discharging the capacitor through the resistor The charge discharge function follows an exponential curve The charge function is given by Example 1 Example 1 where VDD is the pos...

Page 14: ...uation 1 Equation 1 where tc is the time when the input voltage crosses the threshold Using Equation 1 the capacitance value can be computed by Equation 2 Equation 2 Usually R the threshold and VDD ar...

Page 15: ...AN3248 Capacitance measurement Doc ID 17758 Rev 1 15 19 Equation 3 where K is solved using Equation 4 Equation 4 C t K K R 1 threshold VDD ln...

Page 16: ...can be connected to an LDR resistor through a voltage divider VIN The threshold can be set externally to PB3 or set internally to VREFINT 3 4 VREFINT 1 2 VREFINT or 1 4 VREFINT The COMP2 output CMP2O...

Page 17: ...he CMP2OUT level switch from a high level to a low level or vice versa Figure 13 Comparator output behavior versus light intensity The LDR resistor can be used in other microcontroller based applicati...

Page 18: ...Revision history AN3248 18 19 Doc ID 17758 Rev 1 7 Revision history Table 1 Document revision history Date Revision Changes 10 Jan 2011 1 Initial release...

Page 19: ...ARRANTIES OF MERCHANTABILITY FITNESS FOR A PARTICULAR PURPOSE AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION OR INFRINGEMENT OF ANY PATENT COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT UNLE...

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