STEP STEP-MXO2 Hardware Manual Download

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STEP-MXO2 Hardware Manual

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Block Diagram of Board

Figure 4 gives the block diagram of the board. To provide maximum flexibility for the user, all
connections are made through the MachXO2 4000HC FPGA device. Thus, the user can
configure the FPGA to implement any system design.

Figure 4 Board Block Diagram

Summary of Contents for STEP-MXO2

Page 1: ...STEP MXO2 Hardware Manual STEP FPGA STEP 2017 2 14 ...

Page 2: ...oduction 3 2 Package Contents 3 3 Layout and Components 4 3 1 Development Board Layout 4 3 2 FPGA Device 5 3 3 Programming and Configuration 5 3 4 Connecters 5 3 5 Display 5 3 6 Buttons and Switches 5 3 7 Power 5 4 Block Diagram of Board 6 5 Pins Assignments 7 6 Version 7 ...

Page 3: ... embedded RAM plus hardened implementations of I2C and user Flash memory The STEP MXO2 FPGA development board includes hardware such as on board JTAG Programmer 7 Segment Displays LEDs GPIOs and much more By leveraging all of these capabilities the STEP MXO2 FPGA development board is the perfect solution for learning FPGA evaluating and prototyping the true potential of the MXO2 FPGA 2 Package Con...

Page 4: ...raph of the board is shown in Figure 2 and Figure 3 It depicts the layout of the board and indicates the location of the connectors and key components Figure 2 Development Board top view Figure 3 Development Board bottom view This board has many features that allow users to implement a wide range of designed circuits from simple circuits to various creative projects ...

Page 5: ... Kbits 34 User Flash Memory Kbits 96 PLL 2 DDR DDR2 LPDDR Memory Support YES 3 3 Programming and Configuration On Board JTAG Programmer Normal Micro USB connector 3 4 Connecters 36 GPIO Header 3 5 Display 7 Segment Display 2 User LEDs 8 RGB LEDs 2 3 6 Buttons and Switches Buttons 4 Switches 4 3 7 Power 5V DC input from Micro USB ...

Page 6: ...rd Figure 4 gives the block diagram of the board To provide maximum flexibility for the user all connections are made through the MachXO2 4000HC FPGA device Thus the user can configure the FPGA to implement any system design Figure 4 Board Block Diagram ...

Page 7: ...SEG DP1 F1 LED6 N10 GPIO5 J3 GPIO22 H12 SEG DIG1 C9 LED7 N9 GPIO6 K2 GPIO21 J13 Digital Display2 FPGA PINs LED8 P9 GPIO7 K3 GPIO20 J14 Switch FPGA PINs GPIO8 L3 GPIO19 K12 SEG A2 C12 SW1 M7 GPIO9 N5 GPIO18 K14 SEG B2 B14 SW2 M8 GPIO10 P6 GPIO17 K13 SEG C2 J1 SW3 M9 GPIO11 N6 GPIO16 J12 SEG D2 H1 SW4 M10 GPIO12 P7 CS P3 SEG E2 H2 Button FPGA PINs GPIO13 N7 SCK M4 SEG F2 B12 KEY1 L14 GPIO14 P8 SO N4...

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