2
Schematic diagrams
Figure 12.
X-NUCLEO-SNK1M1 circuit schematic (1 of 2)
Interface Configuration
VCC
FLT
DB/
VBUS
CC1
CC2
DP_Gx_Fx
DM_Gx_Fx
DP_Lx
DM_Lx
3.3V
3.3V
GND
GND
GND
GND
GND
GND
GND
3.3V
3.3V
CN10
1
2
3
4
5
6
7
8
9
10
11
12
For the STM32 Nucleo families embedding
L412, L433, L452 and L476, the
USB DM pin coexists with STMG4
CC1 pin.
To exploit USB functionality
with these L4 families,
solder bridges R12, R13 must be
fit and R8 and R9 removed
13
15
16
26
19
20
21
22
23
24
25
27
28
30
31
32
33
34
36
37
38
R21
5.1k
0
R16
100
C6
1u
R18 0
U2
NC
2
ST715PU33R
GND
4
1
Vin
3
8
6
FB
5
7
9
EXP
R6
40.2k
J4
CN6
1
2
3
61300811821
5
6
7
8
J5
CN9
1
2
4
5
6
7
8
R23 0
N.M.
J6
N.M.
R15
R7
200k
C5
220n
R19 0
R17
5.1k
0R22
0
R24
J3
R20 100
J1
1
JUMPER
2
3
CN5
1
2
4
5
6
7
8
9
CN8
1
2
3
5
6
CN7
1
2
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
23
24
25
26
27
28
31
32
33
34
35
36
J2
1
JUMPER
2
3
D15
VDD
E5V
D14
BOOT0
GND
AVDD
U5V
NC/
GND
IOREF
D13
D12
RESET NRST
+3V3
D11
+5V
CC1_G4
D10
FLT_IN
GND
GND
D9
GND
D6
DB_OUT
CC2_G0
A0
A1
D4
A2
AGND
A3
D2
A4
D1
A5
D15
NC/
D14
IOREF
AVDD
RESET
GND
+3V3
D13
+5V
D12
GND
D11
GND
D10
VIN
D8
D7
A0
D5
A2
A3
D3
A4
A5
D1
D0
VBUS
LDO_OUT
ADC_VBUS
FLT_IN
LDO_OUT
NRST
CC1_G4
CC1_G0
CC2_G4
CC1_no_UCPD
CC2_no_UCPD
VCC_OUT
DB_OUT
CC2_G0
VCC_OUT
R14
0
3
19
21
29
37
20
22
30
38
GND
VIN
A0
A2
A5
CC1_no_UCPD
CC2_no_UCPD
ADC_VBUS
R27
0
4
ESQ-119-24-T-D
A1
A2
A4
4
61300811821
61300811821
61300811821
3
D9
D6
3
ESQ-119-24-T-D
14
17
18
29
35
CN10
Jumper-Female
J3 JUMPER-con2 strip-male
J4
JUMPER-con2 strip-male
Jumper-Female
R25 0
R22 0
R26 0
Jumper-Female
Jumper-Female
UM2773
-
Rev 1
page 14
/23
UM2773
Schematic diagrams