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5.1

Power supply

The 

X-NUCLEO-GFX01M1

 is directly powered by a 3.3 V power supply provided by the Nucleo development

board through pin 16 of the CN2 connector.

5.2

SPI QVGA TFT LCD (LCD1)

5.2.1

Description

The SPI QVGA TFT LCD is connected to a first SPI interface (SPIA) of the STM32 device.

5.2.2

Operating voltage

The LCD is designed to operate only with a 3.3 V compatible SPI and GPIO interface.

5.2.3

I/O interface

Table 2. 

I/O configuration of the LCD

Pin number Pin name

Signal name

STM32 GPIO

Function

1

LED_K4

-

-

Display backlight LED4 cathode

2

IM0

GND

-

System interface selection: 4-line 8-bit data SPI mode

3

IM1

3V3

-

4

IM2

3V3

-

5

IM3

3V3

-

6

RESET

DISP_NRESET_PA1

PA1

(1)

 

(2)

Reset active low

7 - 28

-

-

-

Not connected

29

SDO

SPIA_MISO_PA6_PB14

PA6

(1)

PB14

(2)

SPI master in/slave out

30

SDI

SPIA_MOSI_PA7_PB15

PA7

(1)

PB15

(2)

SPI master out/slave in

31

RD

-

-

Not connected

32

RS/SCL

SPIA_SCK_PA5_PB13

PA5

(1)

PB13

(2)

SPI serial clock

33

WR

SPIA_DCX_PB3_PB3

PB3

(1)

 

(2)

SPI write enable

34

CS

SPIA_NCS_PB5_PB5

PB5

(1)

 

(2)

SPI chip select active high

35

FMARK

DISP_TE_PA0

PA0

(1)

 

(2)

Tearing effect output pin to synchronize MCU on frame
writing

36

VCC

3V3

-

3.3V power supply

37

GND

GND

-

Ground

38

LED_A

3V3

-

Display backlight LED common anode

39

LED_K1

-

-

Display backlight LED1 cathode

40

LED_K2

-

-

Display backlight LED2 cathode

41

LED_K3

-

-

Display backlight LED3 cathode

42 - 45

-

-

-

Not connected

 

1. STM32 GPIO for 

NUCLEO-F030R8

NUCLEO-F070RB

NUCLEO-F072RB

NUCLEO-F091RC

NUCLEO-F401RE

,

NUCLEO-F410RB

NUCLEO-F411RE

NUCLEO-F446RE

NUCLEO-G071RB

NUCLEO-L053R8

NUCLEO-L073RZ

,

NUCLEO-L452RE

 and 

NUCLEO-L476RG

.

2. STM32 GPIO for 

NUCLEO-L412RB-P

NUCLEO-L433RC-P

 and 

NUCLEO-L452RE-P

.

 

UM2750

Power supply

UM2750

 - 

Rev 1

page 9/21

Summary of Contents for X-NUCLEO-GFX01M1

Page 1: ...It is compatible with the NUCLEO F030R8 NUCLEO F070RB NUCLEO F072RB NUCLEO F091RC NUCLEO F401RE NUCLEO F410RB NUCLEO F411RE NUCLEO F446RE NUCLEO G071RB NUCLEO L053R8 NUCLEO L073RZ NUCLEO L412RB P NUCL...

Page 2: ...atures 2 2 SPI QVGA TFT LCD 64 Mbit SPI NOR Flash memory Joystick for easy menu navigation Compatible with selected STM32 Nucleo boards using the ST morpho interface UM2750 Features UM2750 Rev 1 page...

Page 3: ...onal identifies the mounting variant when several exist y is the PCB revision and zz is the assembly revision for example B01 The second identification line is the board serial number used for traceab...

Page 4: ...expansion board is available from the X CUBE DISPLAY STM32Cube Expansion Package and must be programmed into the corresponding Nucleo board The latest versions of the demonstration source code and as...

Page 5: ...X NUCLEO GFX01M1 expansion board follow the steps below 1 Plug the board on a compatible STM32 Nucleo development board 2 Download the evaluation firmware and full set of documentation from www st co...

Page 6: ...ifferent features on the X NUCLEO GFX01M1 board The mechanical dimensions of the X NUCLEO GFX01M1 product are shown in Figure 5 Figure 3 X NUCLEO GFX01M1 PCB layout top side 2 2 SPI QVGA TFT LCD Menu...

Page 7: ...Figure 4 X NUCLEO GFX01M1 PCB layout bottom side 64 Mbit SPI NOR Flash memory LCD ZIF connector ST morpho connectors UM2750 Hardware layout and configuration UM2750 Rev 1 page 7 21...

Page 8: ...Figure 5 X NUCLEO GFX01M1 mechanical drawing UM2750 Hardware layout and configuration UM2750 Rev 1 page 8 21...

Page 9: ...PA6 1 PB14 2 SPI master in slave out 30 SDI SPIA_MOSI_PA7_PB15 PA7 1 PB15 2 SPI master out slave in 31 RD Not connected 32 RS SCL SPIA_SCK_PA5_PB13 PA5 1 PB13 2 SPI serial clock 33 WR SPIA_DCX_PB3_PB...

Page 10: ...PA5 2 SPI chip select active low 7 HOLD Pause feature disabled 8 VCC 3V3 3 3V power supply 1 STM32 GPIO for NUCLEO F030R8 NUCLEO F070RB NUCLEO F072RB NUCLEO F091RC NUCLEO F401RE NUCLEO F410RB NUCLEO F...

Page 11: ...ST morpho connectors allow the X NUCLEO GFX01M1 connection to a standard Nucleo 64 development board 5 5 2 I O interface Figure 6 Pinout of the ST morpho connectors 1 2 1 38 37 38 37 CN2 CN3 2 UM2750...

Page 12: ...P_TE_PA0 PA0 1 2 Display tearing effect output pin to synchronize MCU on frame writing 29 Not connected 30 RESET DISP_NRESET_PA1 PA1 1 2 Reset active low 31 34 Not connected 35 SO SPIB_MISO_PC2_PA6 PC...

Page 13: ...20 GND Ground 21 25 Not connected 26 SO SPIB_MISO_PC2_PA6 PA6 2 Flash memory SPI master in slave out 27 Not connected 28 SCLK SPIB_SCK_PB13_PA5 PA5 2 Flash memory SPI chip select active low 29 CS SPI...

Page 14: ...ible party in the USA Terry Blanchard Americas Region Legal Group Vice President and Regional Legal Counsel The Americas STMicroelectronics Inc 750 Canyon Drive Suite 300 Coppell Texas 75019 USA Telep...

Page 15: ...Class A of EN55032 CISPR32 In a residential environment this equipment may cause radio interference Avertissement cet quipement est conforme la Classe A de la EN55032 CISPR 32 Dans un environnement r...

Page 16: ...Revision history Table 7 Document revision history Date Version Changes 26 Aug 2020 1 Initial release UM2750 UM2750 Rev 1 page 16 21...

Page 17: ...SPI NOR Flash memory U1 10 5 3 1 Description 10 5 3 2 Operating voltage 10 5 3 3 I O interface 10 5 4 Joystick B1 10 5 4 1 Description 10 5 4 2 I O interface 10 5 5 ST morpho connectors CN2 and CN3 1...

Page 18: ...List of tables 19 List of figures 20 UM2750 Contents UM2750 Rev 1 page 18 21...

Page 19: ...e 3 I O configuration of the NOR Flash memory 10 Table 4 I O configuration of the joystick 10 Table 5 I O configuration of ST morpho connector CN2 12 Table 6 I O configuration of ST morpho connector C...

Page 20: ...CLEO GFX01M1 bottom view 1 Figure 3 X NUCLEO GFX01M1 PCB layout top side 6 Figure 4 X NUCLEO GFX01M1 PCB layout bottom side 7 Figure 5 X NUCLEO GFX01M1 mechanical drawing 8 Figure 6 Pinout of the ST m...

Page 21: ...ts and ST assumes no liability for application assistance or the design of Purchasers products No license express or implied to any intellectual property right is granted by ST herein Resale of ST pro...

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