Table 59.
DMA2D_SM_2
SM CODE
DMA2D_SM_2
Description
DMA processing and interrupt awareness
Ownership
End user
Detailed implementation
This method is based on system knowledge of frequency and type of DMA2D transaction
expected. In general, image processing systems are based on a deterministic timing for image
framing arrival and processing.
Therefore, this method requires to monitor the expected execution of image processing and,
in case interrupt generation is used, their correct timing and sequence.
Error reporting
Depends on implementation
Fault detection time
Depends on implementation
Addressed fault model
Permanent/transient
Dependency on
Device
configuration
None
Initialization
Depends on implementation
Periodicity
Continuous
Test for the diagnostic
Not applicable
Multiple-fault protection
CPU_SM_0: Periodic core self-test software
Recommendations and known limitations
Implementation of this method can be merged with the safety mechanism NVIC_SM_1:
Expected and unexpected interrupt check
Note:
If image processing performed by DMA2D is used for the implementation of a safety function, system level
considerations (as consistency checks on objects recognition results) may guarantee additional diagnostic
coverage. Similarly, system level data redundancy schemes (as for instance algorithms based on processing for
sequences of multiple image frames) may result in a relevant de rating for transient failure rate.
3.6.13
Chrom-GRC™ (GFXMMU)
Table 60.
GFX_SM_0
SM CODE
GFX_SM_0
Description
Periodic read-back of GFXMMU configuration registers
Ownership
End user
Detailed implementation
This method must be applied to DSI Host configuration registers.
Detailed information on the implementation of this method can be found in
Section 3.6.14 Extended interrupt and events controller (EXTI)
.
Error reporting
Refer to NVIC_SM_0
Fault detection time
Refer to NVIC_SM_0
Addressed fault model
Refer to NVIC_SM_0
Dependency on
Device
configuration
Refer to NVIC_SM_0
Initialization
Refer to NVIC_SM_0
Periodicity
Refer to NVIC_SM_0
Test for the diagnostic
Refer to NVIC_SM_0
Multiple-fault protection
Refer to NVIC_SM_0
Recommendations and known limitations
Refer to NVIC_SM_0
UM2305
Hardware and software diagnostics
UM2305
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Rev 10
page 39/110