Schematic diagrams
UM2107
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DocID029674 Rev 2
2
Schematic diagrams
The following figure shows the board schematic. Each line has 1 x LCP154DJF, 1 x 220 nF
capacitor connected between GND and GATE, 1 female RJ11 to be connected to the line
(labelled: LINE1, LINE2, LINE3 and LINE4) and 1 female RJ11 to be connected to the
SLIC (labelled: SLIC1, SLIC 2, SLIC3 and SLIC4).
Figure 3: STEVAL-OET001V1 circuit schematic
J
1
L
IN
E
1
1
2
3
4
5
6
G
ND
3
P
L
U
G
4
mm
1
G
A
T
E
3
P
L
U
G
4
m
m
1
C
1
220n
F
4
F
U
S
E
F
8
F
U
S
E
F
3
F
U
S
E
J
4
S
L
IC
2
1
2
3
4
5
6
F
7
F
U
S
E
F
6
F
U
S
E
G
ND
1
P
L
U
G
4
m
m
1
J
8
S
L
IC
4
1
2
3
4
5
6
F
5
F
U
S
E
J
6
S
L
IC
3
1
2
3
4
5
6
U
2
L
C
P
154
D
J
F
J
2
S
L
IC
1
1
2
3
4
5
6
U
4
L
C
P
154
D
J
F
U
3
L
C
P
154
D
J
F
G
A
T
E
1
P
L
U
G
4
mm
1
U
1
L
C
P
154
D
J
F
J
3
L
IN
E
2
1
2
3
4
5
6
F
2
F
U
S
E
C
2
220n
J
7
L
IN
E
4
1
2
3
4
5
6
J
5
L
IN
E
3
1
2
3
4
5
6
G
ND
2
P
L
U
G
4
mm
1
F
1
F
U
S
E
G
A
T
E
2
P
L
U
G
4
mm
1
C
4
220n
G
A
T
E
4
P
L
U
G
4
mm
1
C
3
220n
G
ND
4
P
L
U
G
4
m
m
1
GSPG1507160920SG
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