Power-up and delivery states
M95040-125, M95020-125, M95010-125
Doc ID 022545 Rev 1
7
Power-up and delivery states
7.1 Power-up
state
After power-up, the device is in the following state:
●
low power Standby Power mode
●
deselected (after Power-up, a falling edge is required on Chip Select (S) before any
instructions can be started).
●
not in the Hold Condition
●
the Write Enable Latch (WEL) is reset to 0
●
Write In Progress (WIP) is reset to 0
The BP1 and BP0 bits of the Status register are unchanged from the previous power-down
(they are non-volatile bits).
7.2 Initial
delivery
state
The device is delivered with the memory array set at all 1s (FFh). The Block Protect (BP1
and BP0) bits are initialized to 0.
Obsolete Product(s) - Obsolete Product(s)
