2.5
Status Model
2 – 19
2.5.2
Service Request Enable (SRE)
Each bit in the SRE corresponds one-to-one with a bit in the SB
register, and acts as a bitwise AND of the SB flags to generate the
MSS bit in the SB and the
−
STATUS signal. Bit 6 of the SRE is
undefined—setting it has no e
ff
ect, and reading it always returns 0.
This register is set and queried with the
*SRE(?)
command.
This register is cleared at power-on.
2.5.3
Standard Event Status (ESR)
The Standard Event Status register consists of 8 event flags. These
event flags are all “sticky bits” that are set by the corresponding event,
and cleared only by reading or with the
*CLS
command. Reading a
single bit (with the
*ESR?
i
query) clears only bit
i
.
Weight
Bit
Flag
1
0
OPC
2
1
INP
4
2
QYE
8
3
DDE
16
4
EXE
32
5
CME
64
6
URQ
128
7
PON
OPC : Operation Complete. Set by the
*OPC
command.
INP : Input Bu
ff
er Error. Indicates data has been discarded from the
Input Bu
ff
er.
QYE : Query Error. Indicates data in the Output Queue has been lost.
DDE : Device Dependent Error. Indicates a SIM928 had a delayed
execution error, due to an illegal mode state. The error code
can be queried with
LDDE?
.
EXE : Execution Error. Indicates an error in a command that was
successfully parsed. Out-of-range parameters are an example.
The error code can be queried with
LEXE?
.
CME : Command Error. Indicates a parser-detected error. The error
code can be queried with
LCME?
.
URQ : User Request. Indicates a front-panel button was pressed.
PON : Power On. Indicates that an o
ff
-to-on transition has occurred
SIM928
Isolated Voltage Source