Spender DHS3600, Service Manual, Page: 5 / 32

Service manual SPENDER DHS3600
5
2-6 Receive Signaling
1) CTCSS
300 Hz-and-higher audio frequencies of the signal output from the IF IC are cut by a low-filter (U5).
The resulting signal enters the microprocessor (U4). U4 determines whether the CTCSS matches
the preset value, and controls the MUTE and the speaker output sounds in line with the squelch
results of that content.
3. PLL CIRCUIT
The PLL circuit generates the first local oscillator signal for reception and the RF signal for
transmission.
3-1 PLL
The receiver has a VCO (Q301), and the transmitter has another VCO (Q303). The generated signal
passes through Q20 buffer and Q17 amplifies. U3 incorporates the reference oscillation divider and
phase comparator functions. The input signal is divided into the signal according to the divide ratio
data from the microprocessor (U4). This signal divided from the reference signal enter the phase
comparator to produce a differential signal. The frequency control signal is output from the charge
pump. The signal passes through the passive LPF and goes to varicap to control the VCO frequency.
3-2 Reference Oscillator Circuit
The reference oscillator circuit in the PLL IC produces the 12.8MHz PLL reference frequency. To
stabilize the frequency, the characteristics of the 12.8MHz crystal oscillator are controlled.
4. TRANSMITTER
4-1 Transmit Audio
The modulation signal from the microphone is amplified by U9, passes through a reemphasis circuit,
and is amplified by the other to perform operation. Then the resulting signal goes to the VCO through
the VCO modulation terminal for direct FM modulation.
4-2 CTCSS Encoder
A necessary signal for CTCSS encoding is generated by the U4 and U5, and is FM-modulated to the
PLL reference signal. Since the reference OSC does not modulate the loop characteristic frequency
or higher, modulation is performed at the VCO side by adjusting the balance.
4-3 VCO and RF Amplifier
The modulation signal is modulated to VCO by D305. The RF signal from the PLL is amplified by Q17
and Q33 to the sufficient level to drive the power transistor.