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Synchronization (Option)

The setup order for the different synchronization options

(c) Spectrum GmbH

85

When the boards are synchronized by the option starhub there 
will be no delay between the connected boards. This is achie-
ved as all boards, including the one the starhub module is 
mounted on, are connected to the starhub with cables of the 
same length.

The figure on the right shows the clock of three boards with two 
channels each that are synchronized by starhub.

The setup order for the different synchronization options

If you setup the boards for the use with synchronization it is important to keep the order within the software 
commands as mentioned below to get the boards working correctly.

Depending on if you use the board either in standard or in FIFO mode there are slightly different orders in the setup for the synchronization 
option. The following steps are showing the setups either for standard or FIFO mode.

Setup Order for use with standard (non FIFO) mode and equally clocked boards

(1) Set up the board parameters

Set all parameters like for example sample rate, memsize and trigger modes for all the synchronized boards, except the dedicated registers 
for the synchronization itself that are shown in the tables below.

All boards must be set to the same settings for the entire clocking registers (see the according chapter for sample rate generation), for the 
trigger mode and memory and should be set to the same postcounter size to get the same pretrigger sizes as well.

If you use acquisition boards with different pretrigger sizes, please keep in mind that after starting the board 
the pretrigger memory of all boards will be recorded first, before the boards trigger detection is armed. Take 
care to prevent boards with a long pretrigger setup time from hangup by adequately checking the board’s 
status. Long setup times are needed if either you use a huge pretrigger size and/or a slow sample rate.

If you don’t care it might happen that boards with a small pretrigger are armed first and detect a triggerevent, while one or more boards with 
a huge pretrigger are still not armed. This might lead to an endless waiting-state on these boards, which should be avoided.

Example of board setup for three boards

(2) Let the master calculate it’s clocking

To obtain proper clock initailization when doing the first start it is necessary to let the clock master do all clock related calculations prior to 
setting all the synchronization configuration for the slave boards.

Example of board #0 set as clock master and forced to do the appropriate clock calculation

(3) Write Data to on-board memory (output boards only)

If one or more of the synchronized boards are used for generating data (arbitrary waveform generator boards or digital I/O boards with 
one or more channels set to output direction) you have to transfer the data to the board’s on-board memory before starting the synchronization. 
Please refer to the related chapter for the standard mode in this manual. If none of your synchronized boards is used for generation purposes 
you can ignore this step.

// --------- Set the Handles to fit for Windows driver ---------
hDrv[0] = 0;
hDrv[1] = 1;
hDrv[2] = 2;

// (1) ----- Setup all boards, shortened here !!!-----
for (i = 0; i < 3; i++)
   {
   SpcSetParam (hDrv[i], SPC_MEMSIZE,     1024);                  // memory in samples per channel
   SpcSetParam (hDrv[i], SPC_POSTTRIGGER, 512);                   // posttrigger in samples
// ...
   SpcSetParam (hDrv[i], SPC_SAMPLERATE,  10000000);              // set sample rate to all boards
   SpcSetParam (hDrv[i], SPC_TRIGGERMODE, TM_SOFTWARE);           // set trigger mode to all boards
   }

SpcSetParam (hDrv[0], SPC_COMMAND,     SPC_SYNCCALCMASTER);    // Calculate clock settings on master

Summary of Contents for MI.2020

Page 1: ...G 13 17 22927 GROSSHANSDORF GERMANY PHONE 49 0 4102 6956 0 FAX 49 0 4102 6956 66 E MAIL info spec de INTERNET http www spec de MI 20xx fast 8 bit transient recorder A D converter board for PCI bus Hardware Manual Software Driver Manual English version April 1 2005 ...

Page 2: ...8 Windows NT Window 2000 and Windows XP are tradenarks registered trademarks of Microsoft Corporation LabVIEW DASYLab Diadem and LabWindows CVI are tradenarks registered trademarks of National Instruments Corporation MATLAB is a tradenark registered trademark of The Mathworks Inc Agilent VEE VEE Pro and VEE OneLab are tradenarks registered trademarks of Agilent Technologies Inc FlexPro is a regist...

Page 3: ...ling multiple synchronized boards 16 Software Driver Installation 17 Interrupt Sharing 17 Windows 98 18 Installation 18 Version control 18 Driver Update 19 Windows 2000 20 Installation 20 Version control 20 Driver Update 21 Windows XP 22 Installation 22 Version control 22 Driver Update 23 Windows NT 24 Installation 24 Adding boards to the Windows NT driver 24 Driver Update 24 Linux 25 Overview 25 ...

Page 4: ...and Posttrigger 45 Starting without interrupt classic mode 46 Starting with interrupt driven mode 46 Data organization 47 Sample format 47 Reading out the data with SpcGetData 47 FIFO Mode 49 Overview 49 General Information 49 Background FIFO Read 49 Speed Limitations 49 Programming 50 Software Buffers 50 Buffer processing 51 FIFO mode 52 Example FIFO acquisition mode 52 Data organization 52 Sampl...

Page 5: ... 82 Transfer Data 82 Analog Outputs 83 Programming example 83 Synchronization Option 84 The different synchronization options 84 Synchronization with option cascading 84 Synchronization with option starhub 84 The setup order for the different synchronization options 85 Setup Order for use with standard non FIFO mode and equally clocked boards 85 Setup synchronization for use with FIFO mode and equ...

Page 6: ...u will also find the current driver package with the latest bug fixes and new features on our site Please read this manual carefully before you install any hardware or software Spectrum is not responsible for any hardware failures resulting from incorrect usage General Information The 4 models of the MI 20xx series are designed for the fast and high quality data acquisition Every of the up to four...

Page 7: ...e MI 20xx series The following overwiew shows the different available models of the MI 20xx series They differ in the number mounted generation modules and the number of available channels You can also see the model dependant allocation of the output connectors MI 2020 MI 2030 MI 2021 MI 2031 ...

Page 8: ...on because there is just space for one piggyback module on the on board expansion slot Extra I O Option XIO With this simple to use enhancement it is possible to control a wide range of external instruments or other equipment Therefore you have 16 digital I O and the 4 analog outputs available The asynchronous I Os of the extra I O option are useful if an external amplifier should be controlled an...

Page 9: ... option together with the timestamp or extra I O option because the is just space for one piggyback module on the on board expansion slot Timestamp The timestamp module was desi gned to record the exact time infor mation between trigger events The timestamp reset command sets an internal counter to zero The counter is running with the same re solution as the sample rate On each trigger event a tim...

Page 10: ... The serial number of your Spectrum board Every board has a unique serial number The board revision consisting of the base version and the module version A list of the installed options A complete list of all available options is shown in the order information In this example the options Multiple recording and Extra I O with external outputs are installed The date of production consisting of the c...

Page 11: ... clock 1 kS s Power consumption 5 V full speed max 3 4 A 17 0 Watt Min external clock 1 MS s Power consumption 5 V power down max 1 9 A 9 5 Watt Trigger input Standard TTL level Low 0 5 level 0 8 V High 2 0 V level 5 5 V Trigger pulse must be valid 2 clock periods Clock input Standard TTL level Low 0 5 level 0 8 V High 2 0 V level 5 5 V Rising edge is used Required duty cycle 50 5 Trigger output S...

Page 12: ... MI2021 MI 2021 with 16 MSample memory and drivers SBench 5 x MI2xxx 64M Option 64 MSample memory instead of 16 MSample standard mem MI2030 MI 2030 with 16 MSample memory and drivers SBench 5 x MI2xxx 128M Option 128 MSample memory instead of 16 MSample standard mem MI2031 MI 2031 with 16 MSample memory and drivers SBench 5 x MI2xxx 256M Option 256 MSample memory instead of 16 MSample standard mem...

Page 13: ...During longer pauses between the single measurements the power down mode should be called to reduce the heat production Sources of noise The boards of the MI xxxx series should be placed far away from any noise producing source like e g the power supply It should especially be avoided to place the board in the slot directly adjacent to another fast board like the graphics controller Installing the...

Page 14: ... insertion fasten the screws of both brackets carefully without overdoing The figure shows an example of a board with two installed modules Installing a board with extra I O Option XMF Before installing the board you first need to unscrew and remove the dedicated blind brackets usually mounted to cover unused slots of your PC Please keep the screws in reach to fasten your Spectrum board and the ex...

Page 15: ...y to achieve a better visi bility As some of the synchronization cables are not secured against wrong plugging you should take care to have the pin 1 markers on the multiple connectors and the cable on the same side as the figure on the right is showing Mounting the wired boards Before installing the boards you first need to unscrew and remove the dedicated blind brackets usually mounted to cover ...

Page 16: ...er of synchronized boards in a row with the dedicated boards on the outer sides Mounting the wired boards Before installing the boards you first need to unscrew and remove the dedicated blind brackets usually mounted to cover unused slots of your PC Please keep the screws in reach to fasten your Spectrum boards afterwards All Spectrum boards require a full length PCI slot with a track at the backs...

Page 17: ...can only use one interrupt exclusively If this equipment shares an interrupt with the Spectrum board the system will hang up if the second driver is loaded the time is depending on the operating system If this happens it is necessary to reconfigure the system in that way that the critical equipment has an exclusive access to an interrupt On most systems the BIOS shows a list of all installed PCI b...

Page 18: ...stant shows you the exact board type that has been found like the MI 3020 in the exam ple Older boards before june 2004 show Spectrum Board in stead The drivers can be used directly after installation It is not necessary to restart the system The installed drivers are linked in the device manager Below you ll see how to examine the driver version and how to update the driver with a newer version V...

Page 19: ... After down loading the driver unzip it to a temporary folder A new driver version is directly in stalled from the device manager Therefore please open the properties page of the driver as shown in the section before As next step click on the update driver button and follow the steps of the driver installation in a similar way to the previous board and driver installation Please select the path wh...

Page 20: ...stead The drivers can be used di rectly after installation It is not necessary to restart the system The installed drivers are linked in the device man ager Below you ll see how to ex amine the driver version and how to update the driver with a newer version Version control If you want to check which driver version is installed in the system this can be eas ily done in the device manager There for...

Page 21: ...river as shown in the sec tion before As next step click on the update driver button and follow the steps of the driver installation in a similar way to the previous board and driver installation Please select the path where the new driver version was unzipped to If you ve got the new driver version on CD please select the Driver Win98_2k_XP path on the CD containing the new driver version The new...

Page 22: ...ered with the board as installation source The driver files are located on CD in the directory Driver Win98_2k_XP The hardware assistant shows you the exact board type that has been found like the MI 3020 in the example Older boards before june 2004 show Spectrum Board instead The drivers can be used directly after installation It is not necessary to restart the system The installed drivers are li...

Page 23: ...stop and exit all software that could access the boards A new driver version is directly installed from the device manager Therefore please open the properties page of the driver as shown in the section before As next step click on the update driver button and follow the steps of the driver installation in a similar way to the previous board and driver installation Please select the path where the...

Page 24: ... NT driver The Windows NT driver must be configured by the Driver Configuration utility to support more than one board The Driver Configu ration utility is automatical ly installed with the driver The Utility can be found in the start menu as DrvCon fig To add a new card please follow these steps Increase the board number on top of the screen by pressing the right button Change the board type from...

Page 25: ...ctrum PCI PXI and CompactPCI boards The boards are recognized automatically after driver loading Load the driver with the insmod command The insmod command may generate a warning that the driver module was compiled for another kernel version In that case you may try to load the driver module with the force parameter and test the board very carefully If the kernel module could not be loaded in your...

Page 26: ...l rights to the device Now it is possible to access the board using this device Driver info Information about the installed boards could be found in the proc spectrum file All PCI PXI and CompactPCI boards show the basic infor mation found in the EEProm there This is an example output generated by a MI 3020 Automatic load of the driver It is necessary to load the kernel driver module after each st...

Page 27: ... to first test the board function with a ready to run software before starting with programming A full version of SBench 5 x is de livered with the board on CD The program supports all actual acquisition generator and dig ital I O boards from Spectrum Depending on the used board and the software setup one could use SBench as a digital storage oscilloscope a spectrum analyser a logic analyser or si...

Page 28: ...ace of the linux drivers is a little bit different from the windows interface To make the access easier and to have more similar exam ples we added an include file that re maps the standard driver functions to the linux specific functions This include file is found in the path Examples linux spcioctl inc All examples are based on this file Example for including Linux driver Examples Examples can b...

Page 29: ...d automatically All installation parameters are read out from the hardware and stored in the driver The number of PCI boards will be given back in the value Count and the version of the PCI bus itself will be given back in the value PCIVersion Function SpcInitPCIBoards Under Linux this function is not available Instead one must open and close the driver with the standard file functions open and cl...

Page 30: ...f the type handle Function SpcSetData Writes data to the board for a specific memory channel The board must first be initialized The value nr contains the index of the board that you want to access the ch parameter contains the memory channel start and len define the position of data to be written data is a pointer to the array holding the data The function will return an error value in case of ma...

Page 31: ...ith 8 bit resolution the parameter is 1 for all boards with 12 14 or 16 bit resolution this parameter has to be 2 Under Linux the value hDrv must contain the handle that was given back by the open function of that specific board Function SpcGetData Linux int32 SpcGetData int hDrv int32 lCh int32 lStart int32 lLen int16 nBytesPerSample dataptr pvData ...

Page 32: ... can be set by the function SpcSetParam This function sets a register to a defined value or executes a command The board must first be initialized The available software registers for the driver are listed in the board specific part of the documentation below The value nr contains the index of the board that you want to access the value reg is the register that has to be changed and the value valu...

Page 33: ...y channel The board must first be initialized The value nr contains the index of the board that you want to access the ch parameter contains the memory channel start and len define the position of data to be read data is a pointer to the array that should hold the data The function will return an error value in case of malfunction This function is only available on acquisition or i o boards The fu...

Page 34: ...on SpcInitPCIBoard Function SpcSetParam All hardware settings are based on software registers that can be set by the function SpcSetParam This function sets a register to a defined value or executes a command The board must first be initialized The available software registers for the driver are listed in the board specific part of the documentation below The value nr contains the index of the boa...

Page 35: ...generator or i o boards The function is not available on acquisition boards Function SpcGetData Reads data from the board from a specific memory channel The board must first be initialized The value nr contains the index of the board that you want to access the ch parameter contains the memory channel start and len define the position of data to be read data is a pointer to the array that should h...

Page 36: ...ons that contain either a board number Windows or a handle Linux use the common parameter name hDrv Windows users simply have to set the parameter to the according board number as the example below is showing while Linux uses can easily use the handle that is given back for the according board by the initialization function Error handling If one action caused an error in the driver this error and ...

Page 37: ... board and check for errors PCI Register These registers are set by the driver after the PCI initialization The information is found in the on board EEPROM and can easily be read out by your own application software All of the following PCI registers are read only You get access to all registers by using the Spectrum function SpcGetParam with one of the following registers One of the following val...

Page 38: ...s you the maximum possible samplerate the board can run however The information provided here does not consider any restrictions in the maximum speed caused by special channel settings For detailed information about the correlation between the maximum samplerate and the number of activated chanels please refer th the according chapter Installed memory This register returns the size of the installe...

Page 39: ...ures and options as a bitfield so the return value must be masked with one of the masks below to get information about one certain feature PCIBIT_MULTI 1 Is set if the Option Multiple Recording Multiple Replay is installed PCIBIT_DIGITAL 2 Is set if the Option Digital Inputs Digital Outputs is installed PCIBIT_GATE 32 Is set if the Option Gated Sampling Gated Replay is installed PCIBIT_SYNC 512 Is...

Page 40: ... if nCount 0 printf No Spectrum board found n return request and print Board type and some information SpcGetParam hDrv SPC_PCITYP lBrdType SpcGetParam hDrv SPC_PCIMEMSIZE lInstMemsize SpcGetParam hDrv SPC_PCISERIALNO lSerialNumber print the board type depending on bus Board number is always the lower 16 bit of type switch lBrdType TYP_SERIESMASK case TYP_MISERIES printf Board found MI x sn 05d n ...

Page 41: ...matching activation mask You can read out the channel en able register to see what channel activation mask the driver has set Reading out the channel enable register can be done directely after setting it or later like this Important note on channels selection As some of the manuals passages are used in more than one hardware manual most of the registers and channel settings throughout this handbo...

Page 42: ...Value Direction Description SPC_AMP0 30010 r w Defines the input range of channel0 SPC_AMP1 30110 r w Defines the input range of channel1 SPC_AMP2 30210 r w Defines the input range of channel2 SPC_AMP3 30310 r w Defines the input range of channel3 50 50 mV calibrated input range for the appropriate channel 100 100 mV calibrated input range for the appropriate channel 200 200 mV calibrated input ra...

Page 43: ...han can be programmed You can use the following read only register It will give you the maximum relative offset in percentage as an interger value To give you an example how the registers of the input range and the input offset are to be used the following example shows a setup to match all of the four signals in the second input offset figure to match the desired input range Therefore every one o...

Page 44: ... are shown in the table below The values for these EEPROM access registers are the sets that can be stored within the EEPROM The amount of sets available for storing user offset settings depends on the type of board you use The table below shows all the EEPROM sets that are available for your board If you want to make an offset adjustment on all the channels and store the data to the ADJ_USER0 set...

Page 45: ...ou have to define how many samples are to be recorded at all and how many of them should be acquired after the triggerevent has been detected You can access these settings by the registers SPC_MEMSIZE which sets the total amount of data that is recorded and the register SPC_POSTTRIGGER that defines the number of samples to be recorded after the triggerevent has been detected The size of the pretri...

Page 46: ...ned excerpt of a sample program gives you an example of how to start the board in classic mode and how to poll for the SPC_READY flag It is assumed that all board setup has been done before Starting with interrupt driven mode In contrast to the classic mode the interrupt mode has no need for polling for the board s status Starting your board in the interrupt driven mode does in the main not differ...

Page 47: ...els named memory channel 0 and memory channel 1 The data in memory is organized depending on the used channels and the type of board This is a result of the internal hardware structure of the board The samples are re named for better readability A0 is sample 0 of channel 0 C4 is sample 4 of channel 2 Sample format The 8 bit samples in twos complement are always stored in memory as sign extended 8 ...

Page 48: ... memory channel As a result that means that start and len parameter have to be multiplied by the number of channels per memory channel module If for example two channels have been acquired into one memory channel a call like reads out data of both channels from memory channel 0 starting at sample position 4k and a length of 2k The Data array must be of course large enough to hold data of both chan...

Page 49: ...her one is filled up with data The driver is doing this job automatically in the background After the driver has finsihed transferring the data the application software gets a signal and can process data e g stores data to hard disk or makes some calculations After processing the data the application software tells the driver that he can again use the software buffer for acquisition data This two ...

Page 50: ... is defined in bytes This length is used for hardware and software buffers as well Both have the same length The maximum length that can be used is depending on the installed on board memory Each FIFO buffer can be a maximum of half the memory Be aware that the buffer length is given in overall bytes not in samples Therefore the value has to be calculated depending on the activated channels and th...

Page 51: ...amples in Buffer 2 x 2 x Samples in Buffer 2 x 2 x Samples in Buffer 2 x 2 x Samples in Buffer 4 Channels 4 x Samples in Buffer 4 x 2 x Samples in Buffer 4 x 2 x Samples in Buffer 4 x 2 x Samples in Buffer 8 Channels 8 x Samples in Buffer 8 x 2 x Samples in Buffer 8 x 2 x Samples in Buffer 8 x 2 x Samples in Buffer Buffer length to be programmed in Bytes 8 bit mode 16 bit mode 32 bit mode 64 bit m...

Page 52: ...n it receives a new buffer from the driver and returns control immideately back to the driver FIFO acquisition example Data organization When using FIFO mode data in memory is organized in some cases a little bit different then in standard mode This is a result of the internal hardware structure of the board The organization of data is depending on the activated channels The samples are re named f...

Page 53: ...e format The sample format in FIFO mode does not differ from the one of the standard non FIFO mode Please refer to the relating passage concerning the sample format in the standard acquisition chapter for i 0 i lBufferSizeInSamples 4 i Data 0 i FIFOBuffer i 4 0 Data 1 i FIFOBuffer i 4 2 Data 2 i FIFOBuffer i 4 1 Data 3 i FIFOBuffer i 4 3 ...

Page 54: ...d in default mode by a PLL and dividers out of an internal 40 MHz frequency reference In most cases the user does not need to care on how the desired sample rate is generated by multiplying and dividing internally You simply write the desired sample rate to the according register shown in the table below If you want to make sure the sample rate has been set correctly you can also read out the regi...

Page 55: ...rmination is disabled the impedance is 1 Megaohm Please make sure that your source is capable of driving that current and that it still fulfills the clock input specification as given in the technical data section External clocking Direct external clock An external clock can be fed in on the external clock connector of the board This can be any clock that matches the specification of the board The...

Page 56: ...n the activated channels and the mode the board is used in Please be sure to select the correct range Otherwise it is possible that the board will not run properly How to read this table If you have activated all four channels and are using the board in FIFO mode and your external clock is known to be around 5 MHz you have to set the EXRANGE_BURST_S for the external range Example Register Value Di...

Page 57: ...external fed in clock by a fixed value The external clock must be 1 MS s This divided clock is used as a sample clock for the board Available divider values Register Value Direction Description SPC_CLOCKDIV 20040 r w Extra clock divider for external samplerate Allowed values are listed below 1 2 4 8 10 16 20 40 50 80 100 200 400 500 800 1000 2000 ...

Page 58: ... or replay begins This can be useful to synchronize external equipment with your Spectrum board Example for setting up the software trigger External TTL trigger Enabling the external trigger input is done if you choose one of the following external trigger modes The dedicated register for that operation is shown below Register Value Direction Description SPC_TRIGGERMODE 40000 r w Sets the triggerm...

Page 59: ...n how to set up the board for positive TTL trigger Negative TTL trigger This mode is for detecting the falling edges of an external TTL si gnal The board will trigger on the first falling edge that is detec ted after starting the board The next triggerevent will then be detected if the actual recording replay has finished and the board is armed and waiting for a trigger again Register Value Direct...

Page 60: ...xternal TTL signal that are shorter than a programmed pulsewidth If the pulse is lon ger than the programmed pulsewidth no trigger will be detected The board will trigger on the first pulse matching the trigger con dition after starting the board The next triggerevent will then be detected if the actual recording replay has finished and the board is armed and waiting for a trigger again Register V...

Page 61: ...he first pulse matching the trigger con dition after starting the board The next triggerevent will then be detected if the actual recording replay has finished and the board is armed and waiting for a trigger again Register Value Direction Description SPC_PULSEWIDTH 44000 r w Sets the pulsewidth in samples Values from 2 to 255 are allowed SPC_TRIGGERMODE 40000 r w Sets the triggermode for the boar...

Page 62: ...MODE1 40201 r w Sets the trigger mode for channel1 Channeltrigger must be activated with SPC_TRIGGERMODE SPC_TRIGGERMODE2 40202 r w Sets thetrigger mode for channel2 Channeltrigger must be activated with SPC_TRIGGERMODE SPC_TRIGGERMODE3 40203 r w Sets the trigger mode for channel3 Channeltrigger must be activated with SPC_TRIGGERMODE TM_CHXOFF 10020 Channel is not used for trigger detection TM_CHX...

Page 63: ...e men tioned exclusion of the most negative possible value This is useful as new drivers can also be used with older hardware versions because you can check the trigger resolution during runtime The register is shown in the following table In case of a board that uses 8 bits for trigger detection the returned value would be 255 as either the zero and 127 positive and negative values are possible R...

Page 64: ... selected input range To give you an example on how to use this formular we assume that the 1 0 V input range is selected and the board uses 8 bits for trigger detection The result would be 7 81 mV which is the step width for your type of board withing the actually chosen input range Trigger step width Input Rangemax Input Rangemin Number of trigger levels 1 Trigger step width 1000 mV 1000 mV 255 ...

Page 65: ...ger on positive and negative edge The analog input is continuously sampled with the selected sample rate If the programmed triggerlevel is crossed by the channel s signal either rising or falling edge the trigge revent will be detected These edge triggered channel trigger modes correspond to the trigger possibilities of usual ocilloscopes Register Value Direction set to Value SPC_TRIGGERMODE 40000...

Page 66: ... signal from higher to lower values falling edge the pulsewidth counter is started If the signal crosses the triggerlevel again in the opposite direction within the the programmed pulsewidth time no trigger will be detec ted If the pulsewidth counter reaches the programmed amount of samples without the signal crossing the trigger level in the opposite direction the triggerevent will be de tected T...

Page 67: ...s signal from higher to lower values falling edge the pulsewidth counter is started If the pulsewidth counter reaches the programmed amount of samples no trigger will be detected If the signal does cross the triggerlevel again within the the programmed pulsewidth time a triggerevent will be detec ted Register Value Direction set to Value SPC_TRIGGERMODE 40000 r w TM_CHANNEL 20040 SPC_TRIGGERMODE0 ...

Page 68: ...er level within the the programmed pulsewidth time no trigger will be detected If the pulsewidth counter reaches the programmed amount of samples a triggerevent will be detected Register Value Direction set to Value SPC_TRIGGERMODE 40000 r w TM_CHANNEL 20040 SPC_TRIGGERMODE0 40200 r w TM_CHXPOS_GS 10003 SPC_HIGHLEVEL0 42000 r w Set it to the desired upper level relatively to the channel s input ra...

Page 69: ...hes the programmed amount of samples wit hout the signal crossing the lower level no trigger will be detected If the signal does cross the lower level within the the pro grammed pulsewidth time a triggerevent will be detected Register Value Direction set to Value SPC_TRIGGERMODE 40000 r w TM_CHANNEL 20040 SPC_TRIGGERMODE0 40200 r w TM_CHXPOS_SS 10004 SPC_HIGHLEVEL0 42000 r w Set it to the desired ...

Page 70: ...e inside a triggerevent will be detected Register Value Direction set to Value SPC_TRIGGERMODE 40000 r w TM_CHANNEL 20040 SPC_TRIGGERMODE0 40200 r w TM_CHXWINENTER 10040 SPC_HIGHLEVEL0 42000 r w Sets the window s upper level relatively to the channel s input range board dependant SPC_LOWLEVEL0 42100 r w Sets the window s lower level relatively to the channel s input range board dependant Register ...

Page 71: ...ore the pulsewidth counter has stopped no trig ger will be detected If the pulsewidth counter stops and the signal is still outside the window the triggerevent will be detected Register Value Direction set to Value SPC_TRIGGERMODE 40000 r w TM_CHANNEL 20040 SPC_TRIGGERMODE0 40200 r w TM_CHXWINENTER_LP 10041 SPC_HIGHLEVEL0 42000 r w Sets the window s upper level relatively to the channel s input ra...

Page 72: ...nd the signal is still outside the window no trigger will be detected If the signal enters the window before the pulsewidth coun ter has stopped the triggerevent will be detected Register Value Direction set to Value SPC_TRIGGERMODE 40000 r w TM_CHANNEL 20040 SPC_TRIGGERMODE0 40200 r w TM_CHXWINENTER_SP 10042 SPC_HIGHLEVEL0 42000 r w Sets the window s upper level relatively to the channel s input ...

Page 73: ...r program This mode sigficantly reduces the average data transfer rate on the PCI bus This enables you to use faster sample rates then you would be able to in FIFO mode without Multiple Recording Usually the FIFO blocks are multiples of the Multiple Recording segments The advantage of Multiple Recording in FIFO mode is that you can stream data online to the hostsystem You can make realtime data pr...

Page 74: ... 18 samples 34 samples x x 5 MS s 5 samples 5 samples 3 samples 7 samples x x 5 MS s 8 samples 16 samples 10 samples 18 samples x x 10 MS s 22 samples 31 samples 24 samples 33 samples x x 10 SR 100 MS s 23 samples 21 samples 25 samples 23 samples x x 100 MS s 16 samples 32 samples 18 samples 34 samples x x x x 5 MS s 5 samples 5 samples 3 samples 7 samples x x x x 5 MS s 8 samples 16 samples 10 sa...

Page 75: ... The advantage of Gated Sampling in FIFO mode is that you can stream data online to the hostsystem with a lower average data rate than in conventional FIFO mode without gated sampling You can make realtime data processing or store a huge amount of data to the hard disk The table below shows the dedicated register for enabling Gated Sampling For detailed information how to setup and start the board...

Page 76: ...able shows the allowed pulsewidth trigger modes when using the external TTL trigger connector Activated channels Sample rate external TTL trigger internal trigger ext TTL trigger with activated synchronization internal trigger with activated synchronization 0 1 2 3 x 10 MS s 22 samples 31 samples 24 samples 33 samples x 10 SR 100 MS s 23 samples 21 samples 25 samples 23 samples x 100 MS s 16 sampl...

Page 77: ...NEG_LP signal below level longer than the programmed pulsewidth signal crossing level from low to high TM_CHXWINENTER signal entering window between levels signal leaving window between levels TM_CHXWINENTER_LP signal entering window between slower than the programmed pulsewidth signal leaving window between levels TM_CHXWINLEAVE signal leaving window between levels signal entering window between ...

Page 78: ...table shows the valid values that can be written to the timestamp command register StartReset mode In StartReset mode the timestamp counter is set to zero on every start of the board After starting the board the counter counts continuously The timestamps of one recording are referenced to the start of the recording This mode is very useful for Multi ple Recording and Gated Sampling see according c...

Page 79: ...00 r Reads out the actual timestamp mode TS_RESET 0 Resets the whole counter of the timestamp module to zero Waits for synchronization to an external seconds signal This may last up to 1 second The lower part of the counter can be reset with the external fed in second signal The edge of the reset signal can be programmed with the SPC_TIMESTAMP_RESETMODE register as shown in the table below TS_MODE...

Page 80: ... Data format Each timestamp is 56 bit long and internally mapped to 64 bit 8 bytes The counter value contains the number of clocks that have been recorded with the currently used sample rate since the last counter reset has been done The matching time can easily be calculated as des cribed in the general information section at the beginning of this chapter The values the counter is counting and th...

Page 81: ...stamp data buffer free plTimeStamps Reset the board and flush the FIFO SpcSetParam hDrv SPC_COMMAND SPC_RESET Simple setup for recording SpcSetParam hDrv SPC_CHENABLE 1 1 channel for recording SpcSetParam hDrv SPC_SAMPLERATE 1000000 Samplerate 1 MHz SpcSetParam hDrv SPC_TRIGGERMODE TM_TTLPOS External positive Edge SpcSetParam hDrv SPC_MULTI 1 Enable Multiple Recording SpcSetParam hDrv SPC_MEMSIZE ...

Page 82: ...alues so simply have to OR them bitwise Transfer Data The outputs can be written or read by a single 32 bit register If the register is read the actual pin data will be taken Therefore reading the data of outputs gives back the generated pattern The single bits of the digital I O lines correspond with the bitnumber of the 32 bit register Values written to the most significant byte will be ignored ...

Page 83: ... for the analog output A0 10000 mV in steps of 5 mV SPC_XIO_ANALOGOUT1 47121 r w Defines the output value for the analog output A1 10000 mV in steps of 5 mV SPC_XIO_ANALOGOUT2 47122 r w Defines the output value for the analog output A2 10000 mV in steps of 5 mV SPC_XIO_ANALOGOUT3 47123 r w Defines the output value for the analog output A3 10000 mV in steps of 5 mV Register Value Direction Descript...

Page 84: ...ards are marked with the option cs end while middle boards are marked with the option cs mid When the boards are synchronized by the option cascading there will be a delay of about 500 ps between two adjacent boards The figure on the right shows the clocks of three cascaded boards with two channels each where one end board is de fined as a clock master Slave 1 is therefore a middle board and Slave...

Page 85: ...rds trigger detection is armed Take care to prevent boards with a long pretrigger setup time from hangup by adequately checking the board s status Long setup times are needed if either you use a huge pretrigger size and or a slow sample rate If you don t care it might happen that boards with a small pretrigger are armed first and detect a triggerevent while one or more boards with a huge pretrigge...

Page 86: ...ave to tell the driver additionally which of the boards are working as trigger slaves Each of the synchronized boards must be set up either as a trigger master or as a trigger slave to get the synchronization option working correctly Therefore it does not matter if you use the cascading or starhub option It is assumed that only one of the three boards board 2 in this case is set up as trigger mast...

Page 87: ... all of the boards that are defined as trigger slaves first For details on how to start the board in the different modes in standard mode non FIFO please refer to the according chapter earlier in this manual If using the interrupt driven mode SPC_STARTANDWAIT it is necessary to start each board in it s own software thread This is necessary because the function does not return until the board has s...

Page 88: ...for polling for three synchronzed boards 12 Read data from the on board memory acquisition boards only If one or more of the synchronized boards are used for recording data transient recorder boards or digital I O boards with one or more channels set to input direction you have to read out the data from the board s on board memory now Please refer to the related chapter for the standard non FIFO m...

Page 89: ...an one board to clock master Example board number 0 is clock master 7 Define the remaining boards as clock slaves It is necessary to set all the remaining boards to clock slaves to obtain correct internal driver settings Settings the remaining boards to clock slaves Board number 0 is clock master in the example for i 0 i FIFO_BUFFERS i for b 0 b 3 b pnData b i ptr16 GlobalAlloc GMEM_FIXED FIFO_BUF...

Page 90: ... settings in FIFO mode and waits for the first interrupt Register Value Direction Description SPC_COMMAND 0 r w Command register of the board SPC_FIFOSTART 10 Starts the board with the current register settings in FIFO mode and waits for the first interrupt 3 trigger synchronization of trigger master board s SpcSetParam hDrv 2 SPC_COMMAND SPC_SYNCTRIGGERMASTER board 2 set as trigger master 4 trigg...

Page 91: ...ate for one channel of board N Please refer to the dedicated chapter in the board s manual to get informed about the relation beween the board model and the number of actually activated channels per mo dule for the different channel setups As mentioned above the board with the highest sum sample rate must be set up as the clock master This maximum sum sample rate is used as the overall sync speed ...

Page 92: ...he same speed To give you an idea on how to setup the boards the calculations are shown in the following two examples Each example contains of a simple setup of two synchronized boards It is assumed that all of the available channels on the dedicated boards have been activated Example calculation with synchronous speed where slave clock is divided Example calculation with synchronous speed where m...

Page 93: ...es of the different boards depending on the type of board the selected clock divider and the acti vated channels This delay is fixed for data acquisition or generation with the same setup If you use generation boards in the single shot mode this delay will be compensated within the software driver automatically Delay in FIFO mode When the FIFO mode is used a delay is occuring between the data of t...

Page 94: ...wed ERR_READABORT 104h 260 Data read is not allowed after aborting the data acquisition ERR_NOACCESS 105h 261 Access to this register denied No access for user allowed ERR_POWERDOWN 106h 262 Not allowed if powerdown mode is activated ERR_TIMEOUT 107h 263 A timeout occured while waiting for an interrupt Why this happens depends on the application Please check whether the timeout value is programmed...

Page 95: ...able The 40 lead multipin cable is used for the additional digital inputs on analog acquisition boards only or additional digital outputs on analog generation boards only as well as for the digital I O or pat tern generator boards The flat ribbon cable is shipped with the boards that are equipped with one or more of the above mentioned options The cable ends are assembled with a standard IDC socke...

Page 96: ...connector mentioned here is mounted on the bottom side of the Extra I O modu le Extra I O with internal connector Option XIO A3 A0 are the pins for the analog outputs while D15 D0 are the 16 digital I Os Pin2 Pin4 Pin6 Pin8 Pin10 Pin12 Pin14 Pin16 Pin18 Pin20 Pin22 Pin24 Pin26 A2 A0 GND D14 D12 D10 D8 GND D6 D4 D2 D0 GND Pin1 Pin3 Pin5 Pin7 Pin9 Pin11 Pin13 Pin15 Pin17 Pin19 Pin21 Pin23 Pin25 A3 A...

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