SOYO SY-7VDA, User Manual, Page: 70 / 104

BIOS Setup Utility SY-7VDA
66
DRAM Clock/Drive Control
Setting Description Note
DRAM Clock By SPD Default
HCLK-33M /Driver Control
HCLK+33M
This item allows you to
control the DRAM speed.
DRAM Timing By SPD Default
Manual
If enable the DRAM will auto
detect the DRAM timing.
SDRAM Cycle 2.5 Default
Length 2
When synchronous DRAM is
installed, the number of clock
cycles of CAS latency
depends on the DRAM
timing. Do not reset this field
from the default value
specified by the system
designer.
Disabled Bank Interleave
2 Bank Default
4 Bank
Increase DRAM performance.
2T Command Default DRAM Command
Rate
1T Command
Increase DRAM performance.