Motherboard Description
SY-7VBA 133
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operating environments. Both Window 95 VxD and Windows 98 /NT5.0
mini port drivers are supported for interoperability with major AGP-based
3D and DVD- capable multimedia accelerators.
The VT82C693A supports two 32-bit 3.3/5V system buses (one AGP and
one PCI) that are synchronous/ pseudo-synchronous to the CPU bus. The
chip also contains a built-in bus-to-bus bridge to allow simultaneous
concurrent operations on each bus. Five levels (double words) of post
write buffers are included to allow for concurrent CPU and PCI operation.
For PCI master operation, forty-eight levels (double words) of post write
buffers and sixteen levels (double words) of prefetch buffers are included
for concurrent PCI bus and DRAM/cache accesses. The chip also supports
enhanced PCI bus commands such as Memory-Read-Line, Memory-Read-
Multiple and Memory-Write-Invalid commands to minimize snoop
overhead. In addition, advanced features are supported such as snoop
ahead, snoop filtering, L1 write-back forward to PCI master, and L1 write-
back merged with PCI post write buffers to minimize PCI master read
latency and DRAM utilization. Delay transaction and read caching
mechanisms are also implemented for further improvement of over all
system performance.
The 352-pin Ball Grid Array VT82C686A PCI to ISA bridge supports four
levels (double words) of line buffers, type F DMA transfers and delay
transaction to allow efficient PCI bus utilization The VT82C686A also
includes an integrated keyboard controller with PS/2 mouse support,
integrated DS12885 style real time clock with extended 256 byte CMOS
RAM, integrated master mode enhanced IDE controller with full scatter/
gather capability and extension to UltraDMA-33/66 for 33/66 MB/sec
transfer rate, integrated USB interface with root Hub and two function
ports with built-in physical layer transceivers, Distributed DMA supports,
and On Now/ ACPI compliant advanced configuration and power
management interface.
For sophisticated power management, the Via 693A provides independent
clock stop control for the CPU/SDRAM, PCI, and AGP buses and
Summary of Contents for SY-7VBA 133
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