![background image](http://html.mh-extra.com/html/sony/zs-x7-primary/zs-x7-primary_service-manual_1329744026.webp)
– 46 –
IC702 CXD3009Q
IC704 SM5904BF
1
2 3
10 11 12 13 14
15 16 17
18
19
20
CPU
INTERFACE
SERVO AUTO
SEQUENCER
VSS1
FOK
VDD1
XLON
SPOB
CLKO
SPOA
DATO
XLTO
SEIN
CNIN
XLAT
CLOCK
SENS
DATA
SQCK
SQSO
LMUT
RMUT
VSS0
60
59 58 57
56 55 54
52
51
50
49
48
47
46 45 44
BCKI
VSS2
VDD2
XPCK
XUGF
XTSL
GFS
DOUT
C4M
C2PO
EMPHI
EMPH
SCOR
WFCK
EXCK
SBSO
VSS3
53
21
39 LRCK
40 LRCKI
41
PCMD
42
PCMDI
43
BCK
MDP
22
23
PWMI
79
XRST
24 TEST1
TEST0
26
25
CLOCK
GENERATOR
DIGITAL
CLV
VCKI
VPCO
28
27
VCTL
V16M
29 PCO
30 FILO
31 FILI
32 AVSS
35 RF
36 BIAS
37 ASYI
38 ASYO
33 CLTV
34 AVDD
80
62
AVSS
61
VDD3
SYSM
VDD0
77
78
AVDD
AVSS
75
76
AIN2
AOUT2
73
74
AVSS
LOUT2
72
XVSS
71
XTAO
70
XTAI
69
XVDD
66
AIN1
65
AOUT1
64
63
AVDD
68
AVSS
67
LOUT1
ASYMMETRY
CORRECTOR
DIGITAL
PLL
3RD-ORDER
NOISE
SHAPER
PWM
OSC
D / A
INTERFACE
D / A
INTERFACE
SERIAL-IN
INTERFACE
ERROR
CORRECTOR
16K RAM
OVER SAMPLING
DIGITAL FILTER
DIGITAL
CUT
EFM
DEMODULATOR
TIMING
LOGIC
PWM
4
5
6
7 8
9
2 3
4 5
6
8
9
7
34
35
36
37
38
39
40
41
42
43
44
15
16
14
21
20
22
INPUT
BUFFER
INPUT
CONTROL 2
COMPRESSION
MODE
THROUGH
MODE
GENERAL
PORT
MICRO
COMPUTER
1/F
INPUT
1/F
OUTPUT
1/F
33 32 31 30 29 28 27
26 25 24
23
NC
1
VDD2
UC1
UC2
UC3
UC4
UC5
NTEST1
CLK
VSS
YSRDATA
NWE
D1
D0
D3
D2
NCAS
A10/NCAS2
YMCLK
YMDATA
YMLD
YDMUTE
VDD1
ZSENSE
NRESET
ZSRDATA
ZLRCK
ZSCK
18
19
17
INPUT
CONTROL 1
YBLKCK
YFCLK
YFLAG
YSCK
LRCK
NRAS
A9
A8
A7
A6
A5
A4
A0
A1
A2
A3
DRAM 1/F
DECODER
ATTENUATOR
ENCODER
10 11
13
12