Sony XT-100DAB, Service Manual

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• IC302 CXD2710R (DYNAMIC RANGE CONTROL)
Pin No. Pin Name I/O Pin Description
1 AMPIN I Loop filter amplifier input for PLL.
2 AMPOUT O Loop filter amplifier output for PLL.
3 VDD — Power supply pin (+5 V)
4 VSS — Ground
5 AVSS1 — Ground for PLL.
6 VCOC I VCO control signal input
7 AVDD1 — VCO power supply pin for PLL. (+5 V)
8 VCOOUT O VCO output for PLL. (OPEN)
9 MCK1 I Master clock input (768Fs)
10 MCK2 I Master clock input (384Fs) (Fixed at “H”)
11 MCKOUT O Master clock output (384Fs)
12 MCKSEL I MCK1/internal VCO select pin (“H” : MCK1, “L” : internal VCO) (Fixed at “H”.)
13 MUTE I Mute signal input of serial interface from system control (IC401). (L : Mute on)
14 DIN I Program data seriai input from system control (IC401).
15 VSS — Ground
16 SCK I Program data shift clock input from system control (IC401).
17 LD I Program data load input from system control (IC401).
18 DOUT O Intenal data serial output to system control (IC401).
19 BUSY O Data transfer busy signal output to system control (IC401).
20 CLR I Reset signal input from system control (IC401).
21 – 27 TEST I Test pin (Connect to ground.)
28 VDD — Power supply pin (+5 V)
29 VSS — Ground
30 – 38 TEST I Test pin (Connect to ground.)
39 TEST — Test pin (Open)
40 VSS — Ground
41 – 52 TEST — Test pin (Open)
53 VDD — Power supply pin (+5 V)
54 VSS — Ground
55 – 64 TEST — Test pin (Open)
65 VSS — Ground
66 – 74 TEST — Test pin (Open)
75 EBDIR I Test pin (Connect to ground.)
76 UBDIR I Test pin (Connect to ground.)
77 TEST I Test pin (Connect to ground.)
78 VDD — Power supply pin (+5 V)
79 VSS — Ground
80 – 82 TEST I Test pin (Connect to ground.)
83 AVDD2 — Power supply pin for DRAM. (+5 V)
84 AVSS2 — Ground for D-RAM.
85 AVDD3 — Power supply pin for DRAM. (+5 V)
86 AVSS3 — Ground for DRAM.
87 SOUT3 O Serial data (1 sampling, 2 channel) output (Open)
88 SOUT2 O Serial data (1 sampling, 2 channel) output (Open)
89 SOUT1 O Serial data (1 sampling, 2 channel) output
90 VSS — Ground
91 S3DI I Serial data (1 sampling, 2 channel) output (Connect to ground.)
92 S2DI I Serial data (1 sampling, 2 channel) output (Connect to ground.)
93 S1DI I Serial data (1 sampling, 2 channel) input
94 BCK I Bit clock input of the serial I/O data.
95 LRCK I Sampling clock input of the serial I/O data.
96 PCPOUT O Error output of PLL phase comparator. (Open)