5
5
IC501
CXA1782BR (MD MAIN BOARD)
IC502
CXD2507AQ (MD MAIN BOARD)
IC401
TL5001CD (MAIN BOARD)
IC101
BA3129F-T1 (MAIN BOARD)
IC502
SN74HC165ANS (KEY BOARD)
36
35
34
33
32
31
30
29
28
27 26 25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
37
38
39
40
41
42
43
44
45
46
47
48
PHD 2
PHD 1
PHD
LD
RF O
RF I
CP
CB
CC1
CC2
FOK
SENS
C.OUT
XRST
DATA
XLT
CLK
VCC
ISET
SL O
SL M
SL P
TA O
TA M
FSET
TG2
TGU
SRCH
FE O
FLB
FGD
FDFCT
FE M
FEI
FEO
FE BIAS
F
E
EI
VEE
TED
LPFI
TEI
ATSC
TZC
TDFCT
VC
APC
LEVEL S
FOK
MIRR
RF IV AMP1
RF IV AMP2
FE AMP
TTL
IIL
FZC COMP
DFCT
IIL
TTL
IIL DATA REGISTER
INPUT SHIFT REGISTER
ADDRESS DECODER
OUTPUT DECODER
TTL
IIL
TOG1-3
BAL1-3
FS1-4
TG1-2
TM1-7
PS1-4
F IV AMP
E IV AMP
BAL1
BAL2
BAL 3
TE AMP
TZC COMP
DFCT
TM1
DFCT
FS4
ATSC
WINDOW COMP
TOG1
TOG2
TOG3
FCS PHASE
COMPENSATION
FS1
F SET
TG2
TM7
TM3
TM4
TM5
TM6
ISET
TRACKING
PHASE
COMPENSATION
HPF COMP
LPF COMP
TG1
FS2
TM2
RF M
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
52
53
54
55
56
57
58
59
60
61
62
63
64
19
FOK
MON
MDP
MDS
LOCK
TEST
FILO
FILI
PCO
VSS
AVSS
CLTV
AVDD
RF
BIAS
ASYI
ASYO
ASYE
WDCK
DATA
XRST
SENS
MUTE
SQCK
SQSO
EXCK
SBSO
SCOR
VSS
WFCK
EMPH
DOUT
C4M
FSTT
XTSL
XTAO
XTAI
MNTO
SERVO AUTO
SEQUENCER
CPU
INTERFACE
DIGITAL
CLV
SUB CODE
PROCESSOR
EFM
DEMODULATOR
DIGITAL
PLL
ASYMMETRY
CORRECTOR
D/A
INTERFACE
ERROR
CORRECTOR
16K
RAM
DIGITAL
OUT
CLOCK
GENERATOR
LRCK
PCMD
BCLK
GTOP
XUGF
XPCK
V
DD
GFS
RFCK
CZPO
XROF
MNT3
MNT1
XLON
SPOD
SPOC
SPOB
SPOA
CLKO
V
DD
XLTO
DATO
CNIN
SEIN
CLOK
XLAT
3
5
14
4
5
3
6
8
+
–
+
–
+
–
+
–
1
2
3
4
5
9
10
14
13
12
11
6
7
+IN2A
–IN2A
+IN2B
–IN2B
OUT2
SW2
VCC
VEE
SW1
OUT1
–IN1B
+IN1B
–IN1A
+IN1A
REFERENCE
VOLTAGE
S.C.P.
COMPARATOR 1
SWITCH
'ON'
AT
'H'
PWM
COMPARATOR
S.C.P.
COMPARATOR 2
DEAD-TIME
COMPARATOR
S.C.P.
LATCH
OSC
U.V.L.O
ERROR
AMP
–
+
–
+
+
–
+
–
–
+
5
6
7
8
1
2
3
4
OUT
VCC
FEED BACK
INPUT
SCP
DEAD-TIME
CONTROL
RT
GND
1
2
3
4
5
6
7
8
9
10
16
15
14
13
12
11
CK
E
F
G
H
QH
D
C
B
A
SERIAL
IN
CLOCK
INHIBIT
SHIFT/
LOAD
GND
QH
VCC
OUTPUT
QH
SERIAL
INPUT
A
B
C
D
CLOCK
INHIBIT
SHIFT/
LOAD
CLOCK
E
F
G
H
OUTPUT
QH
PARALLEL INPUTS
PARALLEL INPUTS