— 46 —
Pin No.
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
I/O
—
O
I
I/O
I/O
I/O
O
O
I
I
O
I
—
O
I
I
O
O
O
I/O
O
O
I/O
I
O
I
O
I
I
O
O
I/O
I/O
I/O
I/O
I/O
I/O
—
I/O
I/O
I/O
0
0
0
0
0
0
0
0
0
Description
+5 v.
Digital interface signal output.
Oscillating frequency selection signal input.
External sync signal input/output. Normally connected to EXSN.
External sync signal input/output. Normally connected to EXSY.
128 fs signal/256 fs signal during double speed input/output.
256 fs signal/512 fs signal during double speed input/output.
512 fs signal output.
LSB/MSB first of ADDT, ADDI and ADDN serial data select input. LSB first at “H”.
LSB/MSB first of DADT and DADO serial data select input. LSB first at “H”.
X’tal oscillator circuit-2 output. 22.579 MHz.
X’tal oscillator circuit-2 input.
GND.
X’tal oscillator circuit-3 output. 24.576 MHz.
X’tal oscillator circuit-3 input.
F128, BCK and LRCK input;output select input. Output at “H”.
Inverted signal of LR02.
Control byte (1). 16BCK delay signal of LRCK when bit 1 = “L”, LRCK clock output from RX-PLL when bit 1
= “H”.
15BCK delay signal of LRCK.
Fs signal/2 fs signal during double speed input/output.
2 fs signal/4 fs signal during double speed input/output.
Inverted signal output of BCK.
64 fs signal/128 fs signal during double speed input/output.
AD serial data input.
DA serial data input.
Audio data input for digital output. (Connected to DADT normally).
Digital in audio data output.
Audio data input for DIGITAL IN. (Connected to ADDI normally).
Validity flag data input for digital out. (Connected to ERRF normally).
Error data plug/data output of DADT data. Error data at “H”.
Indicates that the error correction status monitor data is being output to D7 to D0 at “H”.
External RAM data input/output (MSB).
External RAM data input/output.
External RAM data input/output.
External RAM data input/output.
External RAM data input/output.
External RAM data input/output.
GND.
External RAM data input/output.
External RAM data input/output. (LSB).
External RAM data input/output.
External RAM data input/output.
External RAM data input/output.
External RAM data input/output.
External RAM data input/output.
External RAM data input/output.
External RAM data input/output.
External RAM data input/output.
External RAM address output.
External RAM address output.
Pin Name
Vpp
TX
SELA
EXSY
EXSN
F128
F256
F512
ADLF
DALF
XT2O
XT2I
Vss
XT30
XT31
PSEN
LR03
LR02
LR01
LRCK
WCK
XBCK
BCK
ADDT
DADT
DADO
ADDI
ADDN
ERRI
ERRF
MNTG
D7
D6
D5
D4
D3
D2
Vss
D1
D0
A00
A01
A02
A03
A04
A05
A06
A07
A08
A09
Summary of Contents for Walkman PCM-M1
Page 3: ... 3 SECTION 1 GENERAL This section is extracted from instruction manual ...
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Page 22: ... 22 Mechanism adjustment parts layout diagram Mechanism Main board ...
Page 26: ...PCM M1 26 27 28 SECTION 4 DIAGRAM 4 1 BLOCK DIAGRAM MD SECTION ...