70
70
HCD-FX100W
HCD-FX100W
•
W
a
vef
orms
– DMB10 Boar
d –
1
IC102
6
(DVDRFIP)
200 mV/DIV, 100 ns/DIV
2
IC102
<xx.
(XTALI)
1 V/DIV, 10 ns/DIV
37 ns
1.8 Vp-p
700 mVp-p
•
IC Bloc
k Dia
grams
IC701,
711,
721 B
A6956AN
IC802 B
U2099FV
IC501 PCM1803DBR
– RELA
Y Boar
d –
–
FL Boar
d –
– MAIN Boar
d –
1
2
3
4
5
6
7
8
9
CONTROL LOGIC
TSD
VREF
OUT2
OUT1
RNF
VM
VCC
FIN
GND
RIN
VSS
N.C.
DATA
CLOCK
LCK
OUTPUT BUFFER (Open Drain)
12BIT SHIFT REGESTER
Q0
Q1
Q2
Q3
Q4
12BIT STORAGE
RAGESTER
CONTOROL
CIRCUIT
L. P. F
VDD
OE
SO
Q11
Q10
Q9
Q8
Q7
Q6
Q5
1
2
3
5
6
7
8
4
10
16
15
14
13
12
11
9
17
18
19
20
VINL
1
VINR
2
VERF1
3
VERF2
4
VCC
5
AGND
6
PDWN
7
BYP
AS
8
FSYNC
9
LRCK
10
MODE1
20
MODE0
19
FMT1
18
FMT0
17
OSR
16
SCKI
15
VDD
14
DGCD
13
DOUT
12
BCK
11
Single-End
/Differential
Converter
5 th Order
Delta-Sigma
Modulator
5 th Order
Delta-Sigma
Modulator
Reference
Single-End
/Differential
Converter
×
1/64 (
×
1/128)
Decimation
Filter
with
DC Cut Filter
Power Supply
Clock and T
iming Control
Serial
Inter
face
Mode/
Format
Control
– MAIN Boar
d –
200 ns
2.4 Vp-p
5.3 Vp-p
20.3 ns
5
IC108
rk
(XFSOIN)
1 V/DIV, 10 ns/DIV
2.7 Vp-p
72.1 ns
6
IC506
9
(MCLK1)
1 V/DIV, 50 ns/DIV
4
IC509
qg
(Xin)
1 V/DIV, 100 ns/DIV
– I/O Boar
d –
7
IC201
wd
(CVBS OUT)
1 V/DIV, 20
μ
s/DIV
8
IC201
wh
(COUT)
1 V/DIV, 20
μ
s/DIV
2.4 Vp-p
H
H
9
IC201
wa
(YOUT)
1 V/DIV, 20
μ
s/DIV
2.1 Vp-p
H
3 Vp-p
–
TX Boar
d –
0
IC804
tl
(OSCO)
1 V/DIV, 20 ns/DIV
41 ns
3.1 Vp-p
125.0 ns
2.7 Vp-p
3
IC601
wd
(X1)
1 V/DIV, 100 ns/DIV
– MIB01 Boar
d –
Summary of Contents for TA-WR2
Page 7: ...5 SS CT46 GS24 TS46 TS46B WS42 MEMO ...
Page 33: ...25 TA WR2 MEMO ...
